1 Introduction

The current mirror is a basic analog building block which is widely used in OTA’s, OP-AMP´s and other complex current mode circuits. Nowadays low-power requirements lead analog designers to consider class AB circuits due to their low quiescent current features and their capability to handle currents several times larger. Besides, voltage supply shrinking in modern fine line technology reduces considerably the voltage headroom for analog design; hence, solutions capable to work with a low-voltage condition and class AB operation are mandatory.

Many class AB current mirrors have been proposed in the past. In ^{1}, extra circuitry was included for achieving class AB operation but, this extra complexity increases the minimum voltage requirement for the overall circuit. Other class AB approaches ^{2}^{-}^{6} improves the input/output impedance of the current mirror, however do not work for bidirectional currents and they are not able to work for low-voltage applications.

The low impedance output node of the Flipped Voltage Follower (FVF) has been extensively used for many applications including current mirrors ^{5}^{-}^{6}; in ^{6} the use of a FVF and a simple current mirror achieves class AB operation with lowvoltage conditions. Although it is an interesting proposal, it is desirable to get simpler solutions at least for some applications. In this work, a very compact bidirectional current mirror is presented, which is able to deal with currents much larger than the bias current.

This paper is organized as follows: In the next section the proposed circuit is presented and explained. Section 3 presents electrical simulations; section 4 experimental results and discussion and finally; in section 5 conclusions are given.

2 Compact Class AB Current Mirror

According to ^{7}, a given circuit works in lowvoltage mode if its voltage supply V_{DD} is less than the sum of the complementary threshold voltages of NMOS and PMOS, i.e. V_{DD}<|V_{THp}| + V_{THn}.

In Fig. 1, a class AB current mirror proposed in ^{1} is shown. Here, transistors M3 and M4 set the bias current I_{bias} in the input branch. Therefore, these transistors can fix a reduced bias current for reduced static power consumption. Nevertheless, the branch of transistors M1 and M2 defines the minimum voltage supply requirement for the circuit, i.e. V_{DDmin}=2V_{DSsat}+V_{GSp}+V_{GSn}. Where V_{DSsat} is the minimum MOS overdrive drain-source voltage for saturation condition and considered for current sources I_{bias} implemented by a single MOS transistor. V_{GSp} is the MOS voltage gate-source which must fulfill V_{GSp}>|V_{THp}| and V_{GSn}> V_{THn} for operation in strong inversion regime.

Using 0.5µm CMOS technology with threshold voltages V_{THn}=0.65V and |V_{THp}|=0.95V, the minimum supply for this circuit should be V_{DDmin}=2V_{DSsat}+V_{GSp}+V_{GSn}, i.e. V_{DDmin} ≥ 2V. Thus, the proposal is not suitable for lowvoltage applications.

The proposed current mirror is presented in Fig 2. This circuit is a simplified version of the previous circuit. From Fig. 1, the absence of transistors M3 and M4 lead to the circuit in Figure 2. Since for low voltage operation V_{DDmin}<|V_{THp}| + V_{THn}, must be fulfilled, this condition cause M1 and M2 in Fig 2, to work in moderate/weak inversion. The MOS subthreshold conduction at drain has an exponential dependency on V_{GS}, for V_{DS}>200mV ^{8}, this is:

where V_{T} = *kT/q*, and ζ >1 is a nonideality factor.

This special feature sets a very small bias current on both branches, preserving the class AB operation. Thus, when a given current I_{in} is introduced into the circuit the input node goes high turning M1 PMOS “off” and turning M2 NMOS “on”. Therefore, the input current is well copied by the M2-M4 mirror. In case I_{in} is extracted from the circuit, input node goes low, therefore, M2 NMOS is turned off and M1 turned on bringing I_{in}. In this case the input copy is achieved by the PMOS counterpart to the output.

The input resistance of the circuit is given simply by:

for the case *g*_{mM1} = *g*_{mM2} . The output resistance R_{o} is given in a similar way as R_{o}=1/(2*g*_{dsM3,4}).

3 Simulation Results

The circuit proposed in Figure 2 was simulated using Spice with BSIM3 version 3.1 model parameters from ON Semi 0.5μm technology available through MOSIS. Transistors aspect ratios are W/L=30μm/1.5μm for all NMOS and PMOS transistors.

In Fig. 3, the bias current of the circuit is plotted against different V_{DD} values. As can be noticed, bias current goes from several pA to μA. Nevertheless, in the range 1.4<V_{DD}<1.6 the bias has a dependency on V_{DD} of 500nA/100mV.

For a V_{DD} = 1.58V, the bias current on both branches is close to 1μA. According to (1), the input resistance is close to R_{in}≈15kΩ and the output resistance R_{out}≈1MΩ.

In Fig. 4, a DC sweep simulation of I_{in} vs I_{out} is shown. The simulation shows the linearity of the current mirror for V_{DD} = 1.58V, since, the bias current is 1μA, the mirror can handle currents quite larger. In this plot, a comparison with the ideal behavior using a load of 1kΩ shows an error of 1.78%.

Fig. 5, shows the simulated AC response, the results show a cutoff frequency near to 30MHz for C_{L}=1pF and R_{L}=1kΩ. Since the circuit only presents a high impedance node at the output it has an unconditionally stable behavior.

The simulated output spectral response is shown in Fig. 6, for 10μA_{p}@1MHz input signal.

Distortion is introduced mainly by the third harmonic which is 42dB below the fundamental. The total harmonic distortion is close to 1%.

4 Experimental Results

The proposed current mirror was fabricated using 0.5μm CMOS technology. The circuit layout was developed using common centroid techniques and dummy structures in order to improve transistor matching. The microphotograph of the circuit is shown in Fig. 7, and the occupied silicon area was 37μm × 27μm.

The different tests were performed using a load of 47kΩ to measure the output current by a digital oscilloscope. The input current was introduced using a signal generator and a series resistance of 1MΩ.

In Fig. 8, the circuit was stimulated with an input square signal of 50kHz; the input current was 20μA_{pp} and the inverted output current shows a good performance with a 5% error in the copied current.

The spectral response was measured also with 5kΩ load and a sinusoidal input signal of 2μA_{p}@5kHz. The trace is shown in Fig. 9. THD was measured close to the simulations results, this is 1%.

Measurements were performed with V_{DD}=1.5V and 1μA bias currents. Hence, the circuit presents a static power consumption of only 3μW.

In Table 1 a comparison among other approaches is presented, as well know, there is a clear relationship between performance and power consumption. Nevertheless, each circuit has own properties in order to be used for a given application. The circuit proposed could be considered as a good choice for low-power and low complexity applications.

5 Conclusions

In this work, a very compact and simple lowvoltage, class AB bidirectional current mirror is presented. The circuit can drive currents much larger than its static bias current as shown through simulations and experimental measurements. The circuit has an unconditionally stable behavior due to the existence of only one high impedance node, thus, no compensating passive elements are required.

The simplicity of the circuit makes it feasible for low-power/ low-voltage applications.