SciELO - Scientific Electronic Library Online

vol.10 issue2Convergence of Minimum-Entropy Robust Estimators: Applications in DSP and InstrumentationAutonomous Agents in Collaborative Ubiquitous Computing Environments author indexsubject indexsearch form
Home Pagealphabetic serial listing  

Services on Demand




Related links

  • Have no similar articlesSimilars in SciELO


Computación y Sistemas

On-line version ISSN 2007-9737Print version ISSN 1405-5546


ZUNIGA GRAJEDA, Virgilio; FEREGRINO URIBE, Claudia  and  CUMPLIDO PARRA, Rene. Parallel Hardware/Software Architecture for the BWT and LZ77 Lossless Data Compression Algorithms. Comp. y Sist. [online]. 2006, vol.10, n.2, pp.172-188. ISSN 2007-9737.

Nowadays, the use of digital communication systems has increased in such a way that network bandwidth is affected. This problem can be solved by implementing data compression algorithms in communication devices to reduce the amount of data to be transmitted. However, the design of large hardware data compression models implies to consider an efficient use of the silicon area. This work proposes the conjunction of two different hardware lossless data compression approaches which share common hardware elements. The project also involves the design of a hardware/software architecture to exploit parallelism increasing execution speed while keeping flexibility. A custom coprocessor unit executes the compute-intense tasks of the Burrows-Wheeler Transform and the Lempel-Ziv lossless data compression schemes. This coprocessor unit is controlled by a SPARC V8 compatible general purpose microprocessor called LEON2.

Keywords : Data compression; Burrows-Wheeler Transform; Lempel-Ziv; Coprocessor; LEON2.

        · abstract in Spanish     · text in English     · English ( pdf )


Creative Commons License All the contents of this journal, except where otherwise noted, is licensed under a Creative Commons Attribution License