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Journal of applied research and technology
versión On-line ISSN 2448-6736versión impresa ISSN 1665-6423
Resumen
KAMARAJ, A.. Secured V2X communication using optimized prime field ECC architecture. J. appl. res. technol [online]. 2024, vol.22, n.2, pp.295-307. Epub 04-Ago-2025. ISSN 2448-6736. https://doi.org/10.22201/icat.24486736e.2024.22.2.2230.
In today's world, vehicles can communicate with one another, pedestrians, roadside infrastructure, and other moving objects using the basic type of vehicular communication known as vehicle-to-everything (V2X) communication. In addition to road safety, security and privacy issues must be taken into consideration in V2X activities. The objective of this research is to ensure an important level of security in various forms of vehicular communication (V2V, V2I, and V2N) and to support vehicles in safely receiving all keys and messages from roadside unit (RSU), other vehicles, or the network with the support of simple cryptographic techniques. This research work develops Elliptic Curve Cryptography (ECC) crypto processor to achieve area efficient, high-speed ECC processor to reach the desired objective. The Koblitz curve secp256k1 is supported by the designed ECC processor for 256-bit point multiplication and point addition. Here, prime fields are incorporated to increase security. A powerful illustration of the "divide and conquer" strategy's ability to accelerate multiplication asymptotically is given by the Karatsuba algorithm. The pipeline technology accelerates multiplication process much faster. For the 256-bit prime field, the proposed pipelined Karatsuba multiplier based ECC processor is implemented on the Xilinx Virtex-7 FPGA. With a maximum clock frequency of 238.40MHz, the proposed Karatsuba-based ECC processor executes 256-bit single point multiplication in 0.937ms, providing 273.21kbps throughput, and taking up 8.42k slices in a Virtex-7 FPGA. Scalar multiplication is extended by incorporating a pipeline by increasing the highest clock frequency by up to 7.97%, which decreases time consumption by 9.90% and boosts throughput by 10.99%. In terms of area, operating frequency, area-delay product, and throughput, the suggested pipelined Karatsuba multiplier based ECC processor performs better than the existing designs.
Palabras llave : Elliptic Curve Cryptography; Point Multiplication; Montgomery; Left to Right algorithm; Karatsuba.












