Procesamiento analógico a partir de elementos altamente resistivos
Analog Processing based on Quasi-Infinite Resistors
Carlos Muñiz-Montero1, Luis Abraham Sánchez-Gaspariano1, Víctor Hugo Ponce-Ponce2, María Elena Aguilar-Jáuregui2 y Osvaldo Espinosa-Sosa2
1 Universidad Politécnica de Puebla, México. carlosmm2k@gmail.com, luisabraham.sg@gmail.com
]]> 2 Centro de Investigación en Computación, Instituto Politécnico Nacional, DF, México. vponce@cic.ipn.mx, maguilar@cic.ipn.mx, espinosa@cic.ipn.mx
Artículo recibido el 30/11/2010
Aceptado el 16/01/2013
Resumen
El presente trabajo propone una técnica para diseñar, a partir de elementos altamente resistivos, circuitos integrados CMOS analógicos tales como amplificadores compensados en offset, filtros sintonizables de baja frecuencia, espejos de corriente programables y generadores de funciones de membresía. La técnica propuesta incorpora transistores operando en la región de inversión débil para reducir los requerimientos de área y las contribuciones de offset, así como para reducir las componentes de ruido y distorsión, mejorando el compromiso exactitud-velocidad-potencia. Éstas características permiten facilitar el acondicionamiento de señales de baja frecuencia y habilitar el diseño de dispositivos con sintonización multidécada de ganancia y frecuencia. Por otro lado, los circuitos propuestos son atractivos para la implementación analógica de arquitecturas reservadas al ámbito digital, tales como filtros adaptables y sistemas difusos, por mencionar algunos, así como dispositivos de procesamiento y acondicionamiento de señal de alta eficiencia. Se reportan caracterizaciones a partir de simulaciones, mediciones y análisis estadísticos de prototipos diseñados con una tecnología CMOS de 0.5|im de largo de canal, dos capas de polisilicio y tres capas de metal. Los resultados obtenidos concuerdan con aquellos anticipados en el diseño de los circuitos.
Palabras clave: CMOS, amplificadores, filtros, lógica difusa, elementos altamente resistivos.
Abstract
]]> This work proposes a technique for design of CMOS analog integrated circuits such as offset compensated amplifiers, low-frequency filters, programmable current mirrors and membership function generators, based on high-value (quasi-infinite) resistors. The proposed technique incorporates transistors operating in weak-inversion mode in order to reduce the area requirements and minimize the DC-offset. In addition, improvement on both, noise performance and linearity, are achieved along with an enhanced speed-accuracy-power tradeoff. Those features make easier the processing of low-frequency signals and allow the design of systems with multi-decade tunability of gain and frequency. The presented circuits are attractive for implementation of high-accuracy processors for signal conditioning as well as architectures usually reserved to digital approaches, for instance neural networks, adaptive filters, and neuro-fuzzy systems, to mention a few. Characterization through computer simulations, statistical analysis and experimental measurements of prototypes in a double-poly, three metal layers, 0.5pm CMOS technology are reported. The attained results follow the course anticipated in the design of the circuits.Keywords: CMOS, amplifiers, filters, fuzzy logic, quasiinfinite resistors.
DESCARGAR ARTÍCULO EN FORMATO PDF
Agradecimientos
Este trabajo ha sido soportado parcialmente por el proyecto 181201 del Consejo Nacional de Ciencia y Tecnología (CONACyT), por el proyecto UPPUE-PTC-047 del Programa de Mejoramiento del Profesorado (PROMEP) y por el proyecto PICCT08-22 del convenio IPN-Instituto de Ciencia y Tecnología del Distrito Federal (ICYTDF).
Referencias
1. Baturone, I., Barriga, A., Sánchez-Solano, S., Jiménez-Fernandéz, C.J., & López, D.R. (2000). Microelectronic Design of Fuzzy Logic-Based Systems. Boca Raton, FL : CRC press. [ Links ]
]]>2. Bikumandla, M., Ramírez-Angulo, J., Urquidi, C., González, R., & López-Martín, A.J. (2004). Biasing CMOS amplifiers using MOS transistors in subthreshold region. IEICE Electronics Express, 1(12), 339-345. [ Links ]
3. Carvajal, R.G., Ramirez-Angulo, J., Lopez Martin, A.J., Torralba, A., Galan, J.A.G., Carlosena, A., Chavero, F.M. (2005). The Flipped Voltage Follower: A Useful Cell for Low-Voltage Low-Power Circuit Design. IEEE Transactions on Circuits and Systems I: Regular Papers, 52(7), 1276-1291. [ Links ]
4. De Lima, J.A. & Dualibe, C. (2001). A linearly tunable low-voltage CMOS transconductor with improved common-mode stability and its application to gm-C filters. IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing, 48(7), 649-660. [ Links ]
5. Dualibe, C., Verleysen, M., & Jespers, P.G.A. (2003). Design of analog Fuzzy Logic Controllers in CMOS Technologies: Implementation, Test and Application. Boston: Kluwer Academic Publishers. [ Links ]
6. Enz, C.C. & Temes, G.C. (1996). Circuit techniques for reducing the effects of op-amp imperfections: autozeroing, correlated double sampling and chopper stabilization. Proceedings of the IEEE, 84(11), 1584-1614. [ Links ]
]]>7. Hasler, P. & Lande T.S. (2001). Overview of Floating-Gate Devices, Circuits, and Systems. IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing, 48(1), 1-3. [ Links ]
8. Huelsman, L.P. & Allen, P.E. (1980). Introduction to the theory and design of active filters. New York: McGraw-Hill. [ Links ]
9. Kachare, M., Ramirez-Angulo, J., Carvajal, R.G., & Lopez-Martin, A.J. (2005). New low-voltage fully programmable CMOS triangular/trapezoidal function generator circuit. IEEE Transactions on Circuits and Systems I: Regular Papers, 52(10), 2033-2042. [ Links ]
10. López-Martín, A.J., De La Cruz-Blas, C.A., & Carlosena, A. (2005). 1.2 V-5 -p w class-AB CMOS log-domain integrator with multidecade tuning. IEEE Transactions on Circuits and Systems II: Express Briefs, 52(10), 665-668. [ Links ]
11. López-Martín, AJ., Ramírez-Angulo, J., Durbha, C., & Carvajal R.G. (2006). Highly Linear Programmable Balanced Current Scaling Technique in Moderate Inversion. IEEE Transactions on Circuits and Systems II: Express Briefs, 53(4), 283-285. [ Links ]
]]>12. Manolescu, A. & Popa, C. (2010). Low-voltage low-power improved linearity CMOS active resistor circuits. Analog Integrated Circuits and Signal Processing, 62(3), 373-387. [ Links ]
13. Muñiz-Montero, C. (2008). New strategies for offset compensation in analog building blocks. PhD Thesis. Instituto Nacional de Astrofísica Óptica y Electrónica, Tonantzintla, Puebla, Mexico. [ Links ]
14. Muñiz-Montero, C., Díaz-Sánchez, A., & González-Carvajal, R. (2007). A very compact KHN filter with multidecade tuning. 18th European Conference on Circuit Theory and Design (ECCTD 2007), Seville, Spain. 44-47. [ Links ]
15. Muñiz-Montero, C., González, R., Díaz-Sánchez, A., & Rocha-Pérez, J.M. (2007). New strategies to improve offset and the speed-accuracy-power tradeoff in CMOS amplifiers. Analog Integrated Circuits and Signal Processing, 53(2-3), 81 -95. [ Links ]
16. Muñiz, C., Díaz, A., & González, R. (2006). Offset Compensation using Unbalanced polarization. IEEE International Symposium on Circuits and Systems, Island of Kos, Greece, 1871-1874. [ Links ]
]]>17. Muñoz, F., Torralba, A., Carvajal, R.G., Tombs, J., & Ramírez-Angulo, J. (2001). Floating-gate based tunable CMOS low-voltage linear transconductor and its application to HF gm-C filter design. IEEE Transactions on Circuits and Systems-II: Analog and Digital Signal Processing, 48(1), 106-110. [ Links ]
18. Ozalevli, E. & Hasler, P.E. (2008). Tunable highly linear floating-gate CMOS resistor using common-mode linearization techniques. IEEE Transactions on Circuits and Systems I: Regular papers, 55(4), 999-1010. [ Links ]
19. Pelgrom, M.J.M., Duinmaijer, A.C.J., & Welbers, A.P.G. (1989). Matching Properties of MOS Transistors. IEEE Journal of Solid-State Circuits, 24(5), 1433-1439. [ Links ]
20. Peng, S.Y., Qureshi, M.S., Hasler, P.E., Basu, A., & Degertekin, F.L. (2008). A Charge-Based Low-Power High-SNR Capacitive Sensing Interface Circuit. IEEE Transactions on Circuits and Systems-I: Regular papers, 55(7), 1863-1872. [ Links ]
21. Ramírez-Angulo, J., López-Martín A.J., Carvajal R.G., & Chavero, F.M. (2004). Very low-voltage analog signal processing based on quasi-floating gate transistors. IEEE Journal of Solid-State Circuits, 39(3), 434-442. [ Links ]
]]>22. Ramírez-Angulo, J., Urquidi, C.A., González-Carvajal, R., Torralva, A., & López-Martín, A. (2003). A new family of very low-voltage analog circuits based on quasi-floating-gate transistors. IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing, 50(5), 214-220. [ Links ]
23. Ramirez-Angulo, J., Garimella, A., Kalyani-Garimella, L.M., Sawant, M., Lopez-Martin, A., & Carvajal, R.G. (2007). Low voltage gain boosting schemes for one stage operational amplifiers. 18th European Conference on Circuit Theory and Design (ECCTD 2007), Seville, Spain, 531 -534. [ Links ]
24. Seo, I. & Fox, R.M. (2006). Comparison of quasi/pseudo-floating gate techniques and low-voltage applications. Analog Integrated Circuits and Signal Processing, 47(2), 183-192. [ Links ]
25. Solis-Bustos, S., Silva-Martinez, J., Maloberti, F., & Sánchez-Sinencio, E. (2000). A 60-db dynamic-range CMOS sixth-order 2.4 Hz low-pass filter for medical applications. IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing, 47(12), 1391 -1398. [ Links ]
26. Srinivasan, V., Serrano, G.J., Gray, J., & Hasler, P. (2007). A Precision CMOS Amplifier Using Floating-Gate Transistors for Offset Cancellation. IEEE Journal of Solid-State Circuits, 42(2), 280-291. [ Links ]
]]>27. Steyaert, M., Peluso, V., Bastos, J., Kinget, P., & Sansen, W. (1997). Custom analog low power design: the problem of low voltage and mismatch. IEEE 1997 Custom Integrated Circuits Conference, Santa Clara, CA, USA, 285-292. [ Links ]
28. Tajalli, A., Leblebici, Y., & Brauer, E.J. (2008). Implementing ultra-high-value floating tunable CMOS resistors. Electronics Letters, 44(5), 349-350. [ Links ]
29. Torralba, A., -Galan , J . , Pen n is i , M . , Rami rez-Ang ulo, J . , & -Martin, A. (2009). Tunable linear MOS resistors using quasi-floating-gate techniques. IEEE Transactions on Circuits and Systems II: Express Briefs, 56(1), 41 -45. [ Links ]
30. Witte, J.F., Makinwa, K.A.A., & Huijsing, J.H. (2007). A CMOS Chopper Offset Stabilized Opamp. IEEE Journal of Solid-State Circuits, 42(7), 1529-1535. [ Links ]
]]>