<?xml version="1.0" encoding="ISO-8859-1"?><article xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">
<front>
<journal-meta>
<journal-id>1665-6423</journal-id>
<journal-title><![CDATA[Journal of applied research and technology]]></journal-title>
<abbrev-journal-title><![CDATA[J. appl. res. technol]]></abbrev-journal-title>
<issn>1665-6423</issn>
<publisher>
<publisher-name><![CDATA[Universidad Nacional Autónoma de México, Instituto de Ciencias Aplicadas y Tecnología]]></publisher-name>
</publisher>
</journal-meta>
<article-meta>
<article-id>S1665-64232011000300002</article-id>
<title-group>
<article-title xml:lang="en"><![CDATA[Digital Implementation of a Logical Functor on a PLD]]></article-title>
</title-group>
<contrib-group>
<contrib contrib-type="author">
<name>
<surname><![CDATA[Vega-Ramírez]]></surname>
<given-names><![CDATA[A. A.]]></given-names>
</name>
<xref ref-type="aff" rid="A01"/>
</contrib>
<contrib contrib-type="author">
<name>
<surname><![CDATA[Pérez-Silva]]></surname>
<given-names><![CDATA[J. L.]]></given-names>
</name>
<xref ref-type="aff" rid="A02"/>
</contrib>
</contrib-group>
<aff id="A01">
<institution><![CDATA[,National Autonomous University of Mexico Faculty of Superior Studies Aragón (FES Aragón) ]]></institution>
<addr-line><![CDATA[Mexico ]]></addr-line>
</aff>
<aff id="A02">
<institution><![CDATA[,National Autonomous University of Mexico Center for Applied Sciences and Technological Development (CCADET) ]]></institution>
<addr-line><![CDATA[Mexico City ]]></addr-line>
<country>Mexico</country>
</aff>
<pub-date pub-type="pub">
<day>00</day>
<month>12</month>
<year>2011</year>
</pub-date>
<pub-date pub-type="epub">
<day>00</day>
<month>12</month>
<year>2011</year>
</pub-date>
<volume>9</volume>
<numero>3</numero>
<fpage>291</fpage>
<lpage>301</lpage>
<copyright-statement/>
<copyright-year/>
<self-uri xlink:href="http://www.scielo.org.mx/scielo.php?script=sci_arttext&amp;pid=S1665-64232011000300002&amp;lng=en&amp;nrm=iso"></self-uri><self-uri xlink:href="http://www.scielo.org.mx/scielo.php?script=sci_abstract&amp;pid=S1665-64232011000300002&amp;lng=en&amp;nrm=iso"></self-uri><self-uri xlink:href="http://www.scielo.org.mx/scielo.php?script=sci_pdf&amp;pid=S1665-64232011000300002&amp;lng=en&amp;nrm=iso"></self-uri><abstract abstract-type="short" xml:lang="en"><p><![CDATA[A digital circuit was implemented on a PLD to emulate the concept of logical functor physically, element from which all the Boolean connectors that exist can be generated. With this circuit, based on the Mc Cullock and Pitts neuron model and operating in agreement with the theory of the functor, several tests were carried out, starting from the application of values to the group of inputs that are considered as the threshold value that governs the behavior of the operator as well as to the group of inputs that are operated by the connector through this threshold. The obtained results present characteristics of behavior that refer to the above mentioned different Boolean operations. In these results, the utility of this functor is observed since it can be manipulated to solve diverse operation necessities, without requiring any connections or alterations to the existing system.]]></p></abstract>
<abstract abstract-type="short" xml:lang="es"><p><![CDATA[Se implementó un circuito digital, implantado en un PLD (Dispositivo Lógico Programable), para poder emular físicamente el concepto de functor lógico, elemento con el cual se pueden generar todos los conectivos booleanos que existen. Con este circuito, basado en el modelo de neurona Mc Cullock y Pitts, y operando de acuerdo con la teoría del functor, se realizaron varias pruebas, a partir de la aplicación de valores, tanto al grupo de entradas que se consideran como el valor de umbral, que rigen el comportamiento del operador, como al conjunto de entradas que son operadas por el conectivo, a través de dicho umbral. Los resultados obtenidos presentan características de comportamiento que refieren a las diferentes operaciones booleanas mencionadas. En estos resultados se observa la utilidad de este functor, ya que puede ser manipulado para resolver diversas necesidades de operación, sin requerir conexiones o alteraciones al sistema existente.]]></p></abstract>
<kwd-group>
<kwd lng="en"><![CDATA[Logic functor]]></kwd>
<kwd lng="en"><![CDATA[time dependent logic]]></kwd>
<kwd lng="en"><![CDATA[electronics neuron model]]></kwd>
</kwd-group>
</article-meta>
</front><body><![CDATA[  	    <p align="center"><font face="verdana" size="4"><b>Digital Implementation of a Logical Functor on a PLD</b></font></p>  	    <p align="center"><font face="verdana" size="2">&nbsp;</font></p>  	    <p align="center"><font face="verdana" size="2"><b>A. A. Vega&#150;Ram&iacute;rez*<sup>1</sup>, J. L. P&eacute;rez&#150;Silva<sup>2</sup></b></font></p>  	    <p align="justify"><font face="verdana" size="2">&nbsp;</font></p>  	    <p align="justify"><font face="verdana" size="2"><i><sup>1</sup> Faculty of Superior Studies Arag&oacute;n (FES Arag&oacute;n), UNAM Avenida Rancho Seco, 57130, Netzahualc&oacute;yotl, Mexico *E&#150;mail:</i> <a href="mailto:alexandro_veg@yahoo.com">alexandro_veg@yahoo.com</a></font></p>  	    <p align="justify"><font face="verdana" size="2"><i><sup>2</sup> Center for Applied Sciences and Technological Development (CCADET), UNAM Circuito Exterior s/n, Ciudad Universitaria, Coyoac&aacute;n, 04510 Mexico City, Mexico.</i></font></p>  	    <p align="justify"><font face="verdana" size="2">&nbsp;</font></p>  	    <p align="justify"><font face="verdana" size="2"><b>ABSTRACT</b></font></p>  	    <p align="justify"><font face="verdana" size="2">A digital circuit was implemented on a PLD to emulate the concept of logical functor physically, element from which all the Boolean connectors that exist can be generated. With this circuit, based on the Mc Cullock and Pitts neuron model and operating in agreement with the theory of the functor, several tests were carried out, starting from the application of values to the group of inputs that are considered as the threshold value that governs the behavior of the operator as well as to the group of inputs that are operated by the connector through this threshold. The obtained results present characteristics of behavior that refer to the above mentioned different Boolean operations. In these results, the utility of this functor is observed since it can be manipulated to solve diverse operation necessities, without requiring any connections or alterations to the existing system.</font></p>  	    ]]></body>
<body><![CDATA[<p align="justify"><font face="verdana" size="2"><b>Keywords:</b> Logic functor, time dependent logic, electronics neuron model.</font></p>  	    <p align="justify"><font face="verdana" size="2">&nbsp;</font></p>  	    <p align="justify"><font face="verdana" size="2"><b>RESUMEN</b></font></p>  	    <p align="justify"><font face="verdana" size="2">Se implement&oacute; un circuito digital, implantado en un PLD (Dispositivo L&oacute;gico Programable), para poder emular f&iacute;sicamente el concepto de functor l&oacute;gico, elemento con el cual se pueden generar todos los conectivos booleanos que existen. Con este circuito, basado en el modelo de neurona Mc Cullock y Pitts, y operando de acuerdo con la teor&iacute;a del functor, se realizaron varias pruebas, a partir de la aplicaci&oacute;n de valores, tanto al grupo de entradas que se consideran como el valor de umbral, que rigen el comportamiento del operador, como al conjunto de entradas que son operadas por el conectivo, a trav&eacute;s de dicho umbral. Los resultados obtenidos presentan caracter&iacute;sticas de comportamiento que refieren a las diferentes operaciones booleanas mencionadas. En estos resultados se observa la utilidad de este functor, ya que puede ser manipulado para resolver diversas necesidades de operaci&oacute;n, sin requerir conexiones o alteraciones al sistema existente.</font></p>  	    <p align="justify"><font face="verdana" size="2">&nbsp;</font></p>  	    <p align="justify"><font face="verdana" size="2"><a href="/pdf/jart/v9n3/v9n3a2.pdf" target="_blank">DESCARGAR ART&Iacute;CULO EN FORMATO PDF</a></font></p>  	    <p align="justify"><font face="verdana" size="2">&nbsp;</font></p>  	    <p align="justify"><font face="verdana" size="2"><b><i>References</i></b></font></p>  	    <!-- ref --><p align="justify"><font face="verdana" size="2">&#91;1&#93; Andr&eacute;, E. Handling Theories in Logic Functors for Recomposing Description Logics. Institut de Recherche en Informatique et Systems Al&eacute;atoires, Rennes, France, 2007. 56 pp.    &nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;[&#160;<a href="javascript:void(0);" onclick="javascript: window.open('/scielo.php?script=sci_nlinks&ref=4827373&pid=S1665-6423201100030000200001&lng=','','width=640,height=500,resizable=yes,scrollbars=1,menubar=yes,');">Links</a>&#160;]<!-- end-ref --></font></p>  	    ]]></body>
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