<?xml version="1.0" encoding="ISO-8859-1"?><article xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">
<front>
<journal-meta>
<journal-id>1405-5546</journal-id>
<journal-title><![CDATA[Computación y Sistemas]]></journal-title>
<abbrev-journal-title><![CDATA[Comp. y Sist.]]></abbrev-journal-title>
<issn>1405-5546</issn>
<publisher>
<publisher-name><![CDATA[Instituto Politécnico Nacional, Centro de Investigación en Computación]]></publisher-name>
</publisher>
</journal-meta>
<article-meta>
<article-id>S1405-55462010000200005</article-id>
<title-group>
<article-title xml:lang="en"><![CDATA[A Robust Evolvable System for the Synthesis of Analog Circuits]]></article-title>
<article-title xml:lang="es"><![CDATA[Un Sistema Evolutivo Robusto para la Síntesis de Circuitos Analógicos]]></article-title>
</title-group>
<contrib-group>
<contrib contrib-type="author">
<name>
<surname><![CDATA[Torres Soto]]></surname>
<given-names><![CDATA[Aurora]]></given-names>
</name>
<xref ref-type="aff" rid="A01"/>
</contrib>
<contrib contrib-type="author">
<name>
<surname><![CDATA[Ponce de León Sentí]]></surname>
<given-names><![CDATA[Eunice E.]]></given-names>
</name>
<xref ref-type="aff" rid="A01"/>
</contrib>
<contrib contrib-type="author">
<name>
<surname><![CDATA[Hernández Aguirre]]></surname>
<given-names><![CDATA[Arturo]]></given-names>
</name>
<xref ref-type="aff" rid="A02"/>
</contrib>
<contrib contrib-type="author">
<name>
<surname><![CDATA[Torres Soto]]></surname>
<given-names><![CDATA[María Dolores]]></given-names>
</name>
<xref ref-type="aff" rid="A03"/>
</contrib>
<contrib contrib-type="author">
<name>
<surname><![CDATA[Díaz Díaz]]></surname>
<given-names><![CDATA[Elva]]></given-names>
</name>
<xref ref-type="aff" rid="A04"/>
</contrib>
</contrib-group>
<aff id="A01">
<institution><![CDATA[,Universidad Autónoma de Aguascalientes Departamento de Ciencias de la Computación ]]></institution>
<addr-line><![CDATA[ ]]></addr-line>
</aff>
<aff id="A02">
<institution><![CDATA[,Centro de Investigación en Matemáticas Departamento de Ciencias de la Computación ]]></institution>
<addr-line><![CDATA[ ]]></addr-line>
</aff>
<aff id="A03">
<institution><![CDATA[,Universidad Autónoma de Aguascalientes Departamento de Sistemas de Información ]]></institution>
<addr-line><![CDATA[ ]]></addr-line>
</aff>
<aff id="A04">
<institution><![CDATA[,Instituto Tecnológico y de Estudios Superiores de Monterrey-Campus Aguascalientes  ]]></institution>
<addr-line><![CDATA[ ]]></addr-line>
</aff>
<pub-date pub-type="pub">
<day>00</day>
<month>06</month>
<year>2010</year>
</pub-date>
<pub-date pub-type="epub">
<day>00</day>
<month>06</month>
<year>2010</year>
</pub-date>
<volume>13</volume>
<numero>4</numero>
<fpage>409</fpage>
<lpage>421</lpage>
<copyright-statement/>
<copyright-year/>
<self-uri xlink:href="http://www.scielo.org.mx/scielo.php?script=sci_arttext&amp;pid=S1405-55462010000200005&amp;lng=en&amp;nrm=iso"></self-uri><self-uri xlink:href="http://www.scielo.org.mx/scielo.php?script=sci_abstract&amp;pid=S1405-55462010000200005&amp;lng=en&amp;nrm=iso"></self-uri><self-uri xlink:href="http://www.scielo.org.mx/scielo.php?script=sci_pdf&amp;pid=S1405-55462010000200005&amp;lng=en&amp;nrm=iso"></self-uri><abstract abstract-type="short" xml:lang="en"><p><![CDATA[This paper presents a group of evolutionary mechanisms for the design of analog circuits, embedded on a genetic algorithm that performs the synthesis of an analog filter. The algorithm interacts with SPICE, to evaluate the fitness of evolved circuits. In order to model an analog circuit, a linear representation is introduced and its corresponding reproduction operators that preserve the valid topological analog circuit class closed. The novelty of this paper consists of the use of a linear representation in combination with the generation mechanism and closed operators that keep the non SPICE simulable circuits below one percent. Furthermore, the concept of preferred values is used into the generation mechanism and genetic operators in order to reduce the gap between the real circuits and the evolvable ones. The performance of the system at designing passive low pass filter is discussed and experiments performed show its efficiency.]]></p></abstract>
<abstract abstract-type="short" xml:lang="es"><p><![CDATA[Este artículo presenta un grupo de mecanismos evolutivos para el diseño de circuitos analógicos, integrados en un algoritmo genético que desarrolla la síntesis de un filtro analógico. El algoritmo interactúa con SPICE para evaluar la adaptabilidad de los circuitos evolucionados. Para modelar un circuito analógico, se emplea una representación lineal y operadores de reproducción que mantienen cerrada la clase de los circuitos tipológicamente válidos. La novedad de este artículo consiste en el uso de la representación lineal en combinación con el mecanismo de generación y los operadores cerrados, de manera que se conserve el porcentaje de los circuitos no-simulables por SPICE, debajo del 1%. También se ha integrado el concepto de valores comerciales dentro de los mecanismos de generación y operadores genéticos, para reducir las discrepancias entre los circuitos implementados y los circuitos evolucionados. Este trabajo describe el desempeño del sistema mediante el diseño de un filtro pasa-bajas y su eficiencia.]]></p></abstract>
<kwd-group>
<kwd lng="en"><![CDATA[Analog Circuit Synthesis]]></kwd>
<kwd lng="en"><![CDATA[Analog Filter Design]]></kwd>
<kwd lng="en"><![CDATA[Genetic Algorithm]]></kwd>
<kwd lng="en"><![CDATA[SPICE Simulation]]></kwd>
<kwd lng="es"><![CDATA[Síntesis de Circuitos Analógicos]]></kwd>
<kwd lng="es"><![CDATA[Diseño de Filtros Analógicos]]></kwd>
<kwd lng="es"><![CDATA[Algoritmo Genético]]></kwd>
<kwd lng="es"><![CDATA[Simulación con SPICE]]></kwd>
</kwd-group>
</article-meta>
</front><body><![CDATA[ <p align="justify"><font face="verdana" size="4">Art&iacute;culos</font></p>     <p align="justify"><font face="verdana" size="4">&nbsp;</font></p>     <p align="center"><font face="verdana" size="4"><b>A Robust Evolvable System for the Synthesis of Analog Circuits</b></font></p>     <p align="center"><font face="verdana" size="2">&nbsp;</font></p>     <p align="center"><font face="verdana" size="3"><b><i>Un Sistema Evolutivo Robusto para la S&iacute;ntesis de Circuitos Anal&oacute;gicos</i></b></font></p>     <p align="center"><font face="verdana" size="2">&nbsp;</font></p>     <p align="center"><font face="verdana" size="2"><b>Aurora Torres Soto<sup>1</sup>, Eunice E. Ponce de Le&oacute;n Sent&iacute;<sup>1</sup>, Arturo Hern&aacute;ndez Aguirre<sup>2</sup>, Mar&iacute;a Dolores Torres Soto<sup>3</sup> and Elva D&iacute;az D&iacute;az<sup>4</sup></b></font></p>     <p align="justify"><font face="verdana" size="2">&nbsp;</font></p>     <p align="justify"><font face="verdana" size="2"><i><sup>1</sup> Universidad Aut&oacute;noma de Aguascalientes. Departamento de Ciencias de la Computaci&oacute;n,</i> <a href="mailto:atorres@correo.uaa.mx">atorres@correo.uaa.mx</a>, <a href="mailto:eponce@correo.uaa.mx">eponce@correo.uaa.mx</a></font></p>     <p align="justify"><font face="verdana" size="2"><i><sup>2</sup> Centro de Investigaci&oacute;n en Matem&aacute;ticas. Departamento de Ciencias de la Computaci&oacute;n, </i><a href="mailto:artha@cimat.mx">artha@cimat.mx</a></font></p>     ]]></body>
<body><![CDATA[<p align="justify"><font face="verdana" size="2"><i><sup>3</sup> Universidad Aut&oacute;noma de Aguascalientes. Departamento de Sistemas de Informaci&oacute;n,</i> <a href="mailto:mdtorres@correo.uaa.mx">mdtorres@correo.uaa.mx</a></font></p>     <p align="justify"><font face="verdana" size="2"><i><sup>4</sup> Instituto Tecnol&oacute;gico y de Estudios Superiores de Monterrey. Campus Aguascalientes,</i> <a href="mailto:elva.diaz@itesm.mx">elva.diaz@itesm.mx</a></font></p>     <p align="justify"><font face="verdana" size="2">&nbsp;</font></p>     <p align="justify"><font face="verdana" size="2">Article received on July 12, 2009.    <br>   Accepted on November 11, 2009</font></p>     <p align="justify"><font face="verdana" size="2">&nbsp;</font></p>     <p align="justify"><font face="verdana" size="2"><b>Abstract</b></font></p>     <p align="justify"><font face="verdana" size="2">This paper presents a group of evolutionary mechanisms for the design of analog circuits, embedded on a genetic algorithm that performs the synthesis of an analog filter. The algorithm interacts with SPICE, to evaluate the fitness of evolved circuits. In order to model an analog circuit, a linear representation is introduced and its corresponding reproduction operators that preserve the valid topological analog circuit class closed. The novelty of this paper consists of the use of a linear representation in combination with the generation mechanism and closed operators that keep the non SPICE simulable circuits below one percent. Furthermore, the concept of preferred values is used into the generation mechanism and genetic operators in order to reduce the gap between the real circuits and the evolvable ones. The performance of the system at designing passive low pass filter is discussed and experiments performed show its efficiency.</font></p>     <p align="justify"><font face="verdana" size="2"><b>Keywords: </b>Analog Circuit Synthesis, Analog Filter Design, Genetic Algorithm, SPICE Simulation. </font></p>     <p align="justify"><font face="verdana" size="2">&nbsp;</font></p>     ]]></body>
<body><![CDATA[<p align="justify"><font face="verdana" size="2"><b>Resumen</b></font></p>     <p align="justify"><font face="verdana" size="2">Este art&iacute;culo presenta un grupo de mecanismos evolutivos para el dise&ntilde;o de circuitos anal&oacute;gicos, integrados en un algoritmo gen&eacute;tico que desarrolla la s&iacute;ntesis de un filtro anal&oacute;gico. El algoritmo interact&uacute;a con SPICE para evaluar la adaptabilidad de los circuitos evolucionados. Para modelar un circuito anal&oacute;gico, se emplea una representaci&oacute;n lineal y operadores de reproducci&oacute;n que mantienen cerrada la clase de los circuitos tipol&oacute;gicamente v&aacute;lidos. La novedad de este art&iacute;culo consiste en el uso de la representaci&oacute;n lineal en combinaci&oacute;n con el mecanismo de generaci&oacute;n y los operadores cerrados, de manera que se conserve el porcentaje de los circuitos no&#150;simulables por SPICE, debajo del 1%. Tambi&eacute;n se ha integrado el concepto de valores comerciales dentro de los mecanismos de generaci&oacute;n y operadores gen&eacute;ticos, para reducir las discrepancias entre los circuitos implementados y los circuitos evolucionados. Este trabajo describe el desempe&ntilde;o del sistema mediante el dise&ntilde;o de un filtro pasa&#150;bajas y su eficiencia.</font></p>     <p align="justify"><font face="verdana" size="2"><b>Palabras clave: </b>S&iacute;ntesis de Circuitos Anal&oacute;gicos, Dise&ntilde;o de Filtros Anal&oacute;gicos, Algoritmo Gen&eacute;tico, Simulaci&oacute;n con SPICE.</font></p>     <p align="justify"><font face="verdana" size="2">&nbsp;</font></p>     <p align="justify"><font face="verdana" size="2"><a href="/pdf/cys/v13n4/v13n4a5.pdf" target="_blank">DESCARGAR ART&Iacute;CULO EN FORMATO PDF</a> </font></p>     <p align="justify"><font face="verdana" size="2">&nbsp;</font></p>     <p align="justify"><font face="verdana" size="2"><b>References</b></font></p>     <!-- ref --><p align="justify"><font face="verdana" size="2">1. <b>Ando, S. &amp; Iba, H. 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