E. Vargas-Calderón¹, F. Sandoval-Ibarra², E. Montoya-Suárez² & O. Corona-Murguía²

¹ Intel-Tecnología de México S. A. de C. V., Periférico Sur 7980 Edif. 4-E, 45600 Tlaquepaque, Jalisco, Mexico

² CINVESTAV-Guadalajara Unit, Av. Científica 1145, Col. El Bajío, 45010 Zapopan, Jalisco, Mexico, sandoval@cts-design.com

Abstract

Since portable systems and processing power applications demand efficient power consumption, this paper deals with the development of an analytical model based on the on-resistance effect of MOS switches to design a silicon-based char-pump voltage generator (VG). This model that is developed for adding design parameters under the designer's control is a useful design tool to quickly estimate the VG's performance in the time domain. Numerical results are compared with transistor-level simulation to validate not only the analytical model, but also to estimate the integration area of a silicon-based VG. It was found that an on-resistance ranging from zero to 50 Ω presents a relative error of 2%. Experimental results show the usefulness of the proposed design model.

PACS: 84.40.Bh; 84.30.Bv; 84.30.Jc.

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