<?xml version="1.0" encoding="ISO-8859-1"?><article xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">
<front>
<journal-meta>
<journal-id>1665-6423</journal-id>
<journal-title><![CDATA[Journal of applied research and technology]]></journal-title>
<abbrev-journal-title><![CDATA[J. appl. res. technol]]></abbrev-journal-title>
<issn>1665-6423</issn>
<publisher>
<publisher-name><![CDATA[Universidad Nacional Autónoma de México, Instituto de Ciencias Aplicadas y Tecnología]]></publisher-name>
</publisher>
</journal-meta>
<article-meta>
<article-id>S1665-64232007000100003</article-id>
<title-group>
<article-title xml:lang="en"><![CDATA[Real time TCP/IP control of modular production systems with FPGAs]]></article-title>
</title-group>
<contrib-group>
<contrib contrib-type="author">
<name>
<surname><![CDATA[Castillo-Atoche]]></surname>
<given-names><![CDATA[A.]]></given-names>
</name>
<xref ref-type="aff" rid="A01"/>
</contrib>
<contrib contrib-type="author">
<name>
<surname><![CDATA[Vázquez-Castillo]]></surname>
<given-names><![CDATA[J.]]></given-names>
</name>
<xref ref-type="aff" rid="A02"/>
</contrib>
<contrib contrib-type="author">
<name>
<surname><![CDATA[Sánchez-Huerta]]></surname>
<given-names><![CDATA[V.]]></given-names>
</name>
<xref ref-type="aff" rid="A02"/>
</contrib>
</contrib-group>
<aff id="A01">
<institution><![CDATA[,Universidad Autónoma de Yucatán Department of Mechatronics ]]></institution>
<addr-line><![CDATA[Mérida Yucatán]]></addr-line>
<country>México</country>
</aff>
<aff id="A02">
<institution><![CDATA[,Universidad de Quintana Roo Department of Sciences and Engineering ]]></institution>
<addr-line><![CDATA[Chetumal Quintana Roo]]></addr-line>
<country>México</country>
</aff>
<pub-date pub-type="pub">
<day>00</day>
<month>00</month>
<year>2007</year>
</pub-date>
<pub-date pub-type="epub">
<day>00</day>
<month>00</month>
<year>2007</year>
</pub-date>
<volume>5</volume>
<numero>1</numero>
<fpage>22</fpage>
<lpage>31</lpage>
<copyright-statement/>
<copyright-year/>
<self-uri xlink:href="http://www.scielo.org.mx/scielo.php?script=sci_arttext&amp;pid=S1665-64232007000100003&amp;lng=en&amp;nrm=iso"></self-uri><self-uri xlink:href="http://www.scielo.org.mx/scielo.php?script=sci_abstract&amp;pid=S1665-64232007000100003&amp;lng=en&amp;nrm=iso"></self-uri><self-uri xlink:href="http://www.scielo.org.mx/scielo.php?script=sci_pdf&amp;pid=S1665-64232007000100003&amp;lng=en&amp;nrm=iso"></self-uri><abstract abstract-type="short" xml:lang="en"><p><![CDATA[The Modular Production System (MPS) can be used to reproduce nearly any function in complex manufacturing processes. In this work a different way of real time TCP/IP control of three different MPS controlled by embedded processors inside a FPGA is proposed. The digital design with FPGA is particularly advantageous due to its parallel processing made possible by its flexible structure, high integration and velocity. The TCP/IP control is carried out with a Rabbit Core microprocessor. This device contains the functions required to implement a web server allowing the remote control of the MPS. A user enters a public IP direction on a designed web page to enable/disable each independent manufacturing process.]]></p></abstract>
<abstract abstract-type="short" xml:lang="es"><p><![CDATA[Los MPS son Sistemas Modulares de Producción que pueden utilizarse para reproducir casi cualquier función en procesos complejos de fabricación. La propuesta de éste artículo se basa en el procesamiento en tiempo real de tres sistemas modulares de producción controlados por procesadores embebidos en un solo circuito integrado VLSI, específicamente un FPGA. El diseño digital con FPGAs presenta una gran ventaja por su procesamiento en paralelo debido a su estructura flexible, alta velocidad e integración. Otra característica importante de esta implementación es que los sistemas de producción son habilitados/deshabilitados a distancia a través de una página web, mediante la implementación de un microprocesador Rabbit que contiene las funciones de servidor de red integradas. El usuario deberá ingresar una IP pública en la página Web diseñada para habilitar/deshabilitar independientemente cada proceso de manufactura.]]></p></abstract>
<kwd-group>
<kwd lng="en"><![CDATA[MPS]]></kwd>
<kwd lng="en"><![CDATA[FPGA]]></kwd>
<kwd lng="en"><![CDATA[Picoblaze]]></kwd>
<kwd lng="en"><![CDATA[TCP/IP]]></kwd>
</kwd-group>
</article-meta>
</front><body><![CDATA[  	    <p align="center"><font face="verdana" size="4"><b>Real time TCP/IP control of modular production systems with FPGAs</b></font></p>  	    <p align="center"><font face="verdana" size="2">&nbsp;</font></p>  	    <p align="center"><font face="verdana" size="2"><b>A. Castillo&#45;Atoche<sup>1</sup>, J. V&aacute;zquez&#45;Castillo<sup>2</sup> &amp; V. S&aacute;nchez&#45;Huerta<sup>2</sup></b></font></p>  	    <p align="justify"><font face="verdana" size="2">&nbsp;</font></p>  	    <p align="justify"><font face="verdana" size="2"><sup>1</sup><i>Autonomous University of Yucatan, Department of Mechatronics, C.60 #491 &#45;A por 57, CP. 97000, M&eacute;rida, Yucat&aacute;n, M&eacute;xico</i></font></p>  	    <p align="justify"><font face="verdana" size="2"><sup>2</sup><i>University of Quintana Roo, Department of Sciences and Engineering, Boulevard Bah&iacute;a s/n Esq. Ignacio Comonfort, CP. 77019, Chetumal, Quintana Roo, Mexico.</i></font></p>  	    <p align="justify"><font face="verdana" size="2">&nbsp;</font></p>  	    <p align="justify"><font face="verdana" size="2"><b>Abstract</b></font></p>      <p align="justify"><font face="verdana" size="2">The Modular Production System (MPS) can be used to reproduce nearly any function in complex manufacturing processes. In this work a different way of real time TCP/IP control of three different MPS controlled by embedded processors inside a FPGA is proposed. The digital design with FPGA is particularly advantageous due to its parallel processing made possible by its flexible structure, high integration and velocity. The TCP/IP control is carried out with a Rabbit Core microprocessor. This device contains the functions required to implement a web server allowing the remote control of the MPS. A user enters a public IP direction on a designed web page to enable/disable each independent manufacturing process.</font></p>  	    ]]></body>
<body><![CDATA[<p align="justify"><font face="verdana" size="2"><b>Keywords</b>: MPS, FPGA, Picoblaze, TCP/IP.</font></p>  	    <p align="justify"><font face="verdana" size="2">&nbsp;</font></p>  	    <p align="justify"><font face="verdana" size="2"><b>Resumen</b></font></p>  	    <p align="justify"><font face="verdana" size="2">Los MPS son Sistemas Modulares de Producci&oacute;n que pueden utilizarse para reproducir casi cualquier funci&oacute;n en procesos complejos de fabricaci&oacute;n. La propuesta de &eacute;ste art&iacute;culo se basa en el procesamiento en tiempo real de tres sistemas modulares de producci&oacute;n controlados por procesadores embebidos en un solo circuito integrado VLSI, espec&iacute;ficamente un FPGA. El dise&ntilde;o digital con FPGAs presenta una gran ventaja por su procesamiento en paralelo debido a su estructura flexible, alta velocidad e integraci&oacute;n. Otra caracter&iacute;stica importante de esta implementaci&oacute;n es que los sistemas de producci&oacute;n son habilitados/deshabilitados a distancia a trav&eacute;s de una p&aacute;gina web, mediante la implementaci&oacute;n de un microprocesador Rabbit que contiene las funciones de servidor de red integradas. El usuario deber&aacute; ingresar una IP p&uacute;blica en la p&aacute;gina Web dise&ntilde;ada para habilitar/deshabilitar independientemente cada proceso de manufactura.</font></p>  	    <p align="justify"><font face="verdana" size="2">&nbsp;</font></p>  	    <p align="justify"><font face="verdana" size="2"><a href="/pdf/jart/v5n1/v5n1a3.pdf" target="_blank">DESCARGAR ART&Iacute;CULO EN FORMATO PDF</a></font></p>     <p align="justify"><font face="verdana" size="2">&nbsp;</font></p>  	    <p align="justify"><font face="verdana" size="2"><b>6. REFERENCES</b></font></p>  	    <!-- ref --><p align="justify"><font face="verdana" size="2">&#91;1&#93; User's Manual of Testing MPS System, Festo, Inc., 2005.    &nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;[&#160;<a href="javascript:void(0);" onclick="javascript: window.open('/scielo.php?script=sci_nlinks&ref=4818712&pid=S1665-6423200700010000300001&lng=','','width=640,height=500,resizable=yes,scrollbars=1,menubar=yes,');">Links</a>&#160;]<!-- end-ref --></font></p>  	    ]]></body>
<body><![CDATA[<!-- ref --><p align="justify"><font face="verdana" size="2">&#91;2&#93; Le Thuyen, Renner Frank, Glesner M., "Hardware in&#45;the&#45;loop Simulation &#45;A Rapid Prototyping Approach for Designing Mechatronics Systems", Proceedings, 8<sup>th</sup> IEEE International Workshop on 24&#45;26 June 1997. Page(s) 116&#45;121.    &nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;[&#160;<a href="javascript:void(0);" onclick="javascript: window.open('/scielo.php?script=sci_nlinks&ref=4818714&pid=S1665-6423200700010000300002&lng=','','width=640,height=500,resizable=yes,scrollbars=1,menubar=yes,');">Links</a>&#160;]<!-- end-ref --></font></p>  	    <!-- ref --><p align="justify"><font face="verdana" size="2">&#91;3&#93; Rogers, G.G., and Bottaci L. "Modular Production Systems: A New Paradigm for Manufacturing", International Journal of Intelligent Manufacturing, Volume 8, Issue 2, April 1997, Chapman &amp; Hall, London, England, pp 147&#45;156.    &nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;[&#160;<a href="javascript:void(0);" onclick="javascript: window.open('/scielo.php?script=sci_nlinks&ref=4818716&pid=S1665-6423200700010000300003&lng=','','width=640,height=500,resizable=yes,scrollbars=1,menubar=yes,');">Links</a>&#160;]<!-- end-ref --></font></p>  	    <!-- ref --><p align="justify"><font face="verdana" size="2">&#91;4&#93; RabbitCore RCM3700 User's Manual, Z&#45;World, Inc., U.S.A. 2003 &#45; 2004.    &nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;[&#160;<a href="javascript:void(0);" onclick="javascript: window.open('/scielo.php?script=sci_nlinks&ref=4818718&pid=S1665-6423200700010000300004&lng=','','width=640,height=500,resizable=yes,scrollbars=1,menubar=yes,');">Links</a>&#160;]<!-- end-ref --></font></p>  	    <!-- ref --><p align="justify"><font face="verdana" size="2">&#91;5&#93; Xilinx System Generator v7.1 User Guide &#45; PicoBlaze Microcontroller, Xilinx, Inc., U.S.A. 2005.    &nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;[&#160;<a href="javascript:void(0);" onclick="javascript: window.open('/scielo.php?script=sci_nlinks&ref=4818720&pid=S1665-6423200700010000300005&lng=','','width=640,height=500,resizable=yes,scrollbars=1,menubar=yes,');">Links</a>&#160;]<!-- end-ref --></font></p>  	    <!-- ref --><p align="justify"><font face="verdana" size="2">&#91;6&#93; Grega Wojciech, "Hardware&#45;in&#45;the&#45;loop simulation and its application in control education", 29th ASEE/IEEE Frontiers in Education Conference, November 10 &#45; 13, 1999 San Juan, Puerto Rico.    &nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;[&#160;<a href="javascript:void(0);" onclick="javascript: window.open('/scielo.php?script=sci_nlinks&ref=4818722&pid=S1665-6423200700010000300006&lng=','','width=640,height=500,resizable=yes,scrollbars=1,menubar=yes,');">Links</a>&#160;]<!-- end-ref --></font></p>  	    ]]></body>
<body><![CDATA[<!-- ref --><p align="justify"><font face="verdana" size="2">&#91;7&#93; Masashi, O., Tatsuya, F., Masaguki T. and Shinji Y. "Development of Autonomously Mobile Robot with Control System Connected by TCP/IP Network" 27<sup>th</sup> Annual Conference of the IEEE Industrial Electronics Society, 2001.    &nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;[&#160;<a href="javascript:void(0);" onclick="javascript: window.open('/scielo.php?script=sci_nlinks&ref=4818724&pid=S1665-6423200700010000300007&lng=','','width=640,height=500,resizable=yes,scrollbars=1,menubar=yes,');">Links</a>&#160;]<!-- end-ref --></font></p>  	    <!-- ref --><p align="justify"><font face="verdana" size="2">&#91;8&#93; Clive Maxfield, "The design warrior's guide to FPGA's", Elsevier 2005.    &nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;[&#160;<a href="javascript:void(0);" onclick="javascript: window.open('/scielo.php?script=sci_nlinks&ref=4818726&pid=S1665-6423200700010000300008&lng=','','width=640,height=500,resizable=yes,scrollbars=1,menubar=yes,');">Links</a>&#160;]<!-- end-ref --></font></p>  	    <!-- ref --><p align="justify"><font face="verdana" size="2">&#91;9&#93; Hyder, K. and Perrin B."Embedded Systems Design using the Rabbit 3000 Microprocessor: Interfacing, Networking, and Application Development", Elsevier 2005.    &nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;[&#160;<a href="javascript:void(0);" onclick="javascript: window.open('/scielo.php?script=sci_nlinks&ref=4818728&pid=S1665-6423200700010000300009&lng=','','width=640,height=500,resizable=yes,scrollbars=1,menubar=yes,');">Links</a>&#160;]<!-- end-ref --></font></p>  	    <!-- ref --><p align="justify"><font face="verdana" size="2">&#91;10&#93; Heinkel, U. "The VHDL Reference: A Practical Guide to Computer&#45;Aided Integrated Circuit Design including VHDL&#45;AMS", Chichester, New York: Wiley, 2000.    &nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;[&#160;<a href="javascript:void(0);" onclick="javascript: window.open('/scielo.php?script=sci_nlinks&ref=4818730&pid=S1665-6423200700010000300010&lng=','','width=640,height=500,resizable=yes,scrollbars=1,menubar=yes,');">Links</a>&#160;]<!-- end-ref --></font></p>  	    <!-- ref --><p align="justify"><font face="verdana" size="2">&#91;11&#93; Yalamanchili, S. "Introductory VHDL: From Simulation to Synthesis", Prentice Hall, New Jersey 2001.    &nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;[&#160;<a href="javascript:void(0);" onclick="javascript: window.open('/scielo.php?script=sci_nlinks&ref=4818732&pid=S1665-6423200700010000300011&lng=','','width=640,height=500,resizable=yes,scrollbars=1,menubar=yes,');">Links</a>&#160;]<!-- end-ref --></font></p>     ]]></body>
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