<?xml version="1.0" encoding="ISO-8859-1"?><article xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">
<front>
<journal-meta>
<journal-id>1665-6423</journal-id>
<journal-title><![CDATA[Journal of applied research and technology]]></journal-title>
<abbrev-journal-title><![CDATA[J. appl. res. technol]]></abbrev-journal-title>
<issn>1665-6423</issn>
<publisher>
<publisher-name><![CDATA[Universidad Nacional Autónoma de México, Instituto de Ciencias Aplicadas y Tecnología]]></publisher-name>
</publisher>
</journal-meta>
<article-meta>
<article-id>S1665-64232003000300005</article-id>
<title-group>
<article-title xml:lang="en"><![CDATA[A pure nodal-analysis method suitable for analog circuits using nullors]]></article-title>
</title-group>
<contrib-group>
<contrib contrib-type="author">
<name>
<surname><![CDATA[Tlelo-Cuautle]]></surname>
<given-names><![CDATA[E.]]></given-names>
</name>
<xref ref-type="aff" rid="A01"/>
</contrib>
<contrib contrib-type="author">
<name>
<surname><![CDATA[Sarmiento-Reyes]]></surname>
<given-names><![CDATA[L.A.]]></given-names>
</name>
</contrib>
</contrib-group>
<aff id="A01">
<institution><![CDATA[,Instituto Nacional de Astrofísica Optica y Electrónica Departamento de Electrónica ]]></institution>
<addr-line><![CDATA[Puebla ]]></addr-line>
<country>México</country>
</aff>
<pub-date pub-type="pub">
<day>00</day>
<month>00</month>
<year>2003</year>
</pub-date>
<pub-date pub-type="epub">
<day>00</day>
<month>00</month>
<year>2003</year>
</pub-date>
<volume>1</volume>
<numero>3</numero>
<fpage>235</fpage>
<lpage>247</lpage>
<copyright-statement/>
<copyright-year/>
<self-uri xlink:href="http://www.scielo.org.mx/scielo.php?script=sci_arttext&amp;pid=S1665-64232003000300005&amp;lng=en&amp;nrm=iso"></self-uri><self-uri xlink:href="http://www.scielo.org.mx/scielo.php?script=sci_abstract&amp;pid=S1665-64232003000300005&amp;lng=en&amp;nrm=iso"></self-uri><self-uri xlink:href="http://www.scielo.org.mx/scielo.php?script=sci_pdf&amp;pid=S1665-64232003000300005&amp;lng=en&amp;nrm=iso"></self-uri><abstract abstract-type="short" xml:lang="en"><p><![CDATA[A novel technique suitable for computer-aided analysis of analog integrated circuits (ICs) is introduced. This technique uses the features of both nodal-analysis (NA) and symbolic analysis, at nullor level. First, the nullor is used to model the ideal behavior of several analog devices, namely: transistors, opamps, OTAs, and current conveyors. From this modeling approach, it is shown how to transform circuits working in voltage-mode to current-mode and vice-versa. Second, it is demonstrated that using nullors, all non-NA-compatible elements can be transformed into NA-compatible ones, this results in a computationally-improved pure-NA method. Third, the computation of fully-symbolic expressions using MAPLEV&#8482;, is described. It is demonstrated that a symbolic expression gives more insight in the behavior and performance of the circuit. Finally, several examples demonstrate the suitability and appropriateness of the proposed method to be used in education.]]></p></abstract>
<kwd-group>
<kwd lng="en"><![CDATA[CAD Tools]]></kwd>
<kwd lng="en"><![CDATA[Circuit Theory]]></kwd>
<kwd lng="en"><![CDATA[Nullors]]></kwd>
<kwd lng="en"><![CDATA[Analog Modeling]]></kwd>
<kwd lng="en"><![CDATA[Symbolic Analysis]]></kwd>
<kwd lng="en"><![CDATA[Nodal Analysis]]></kwd>
</kwd-group>
</article-meta>
</front><body><![CDATA[  	    <p align="center"><font face="verdana" size="4"><b>A pure nodal&#45;analysis method suitable for analog circuits using nullors</b></font></p>  	    <p>&nbsp;</p>  	    <p align="center"><font face="verdana" size="2"><b>E. Tlelo&#45;Cuautle, L.A. Sarmiento&#45;Reyes</b></font></p>  	    <p>&nbsp;</p>  	    <p align="justify"><font face="verdana" size="2"><i>INAOE Electronics Departament, Puebla, Mexico.</i> <a href="mailto:etlelo@inaoep.mx">etlelo@inaoep.mx</a></font></p>  	    <p>&nbsp;</p>  	    <p align="justify"><font face="verdana" size="2">Received: September 28<sup>th</sup> 2001.    <br> 	Accepted: January 23<sup>th</sup> 2003.</font></p>  	    <p>&nbsp;</p>  	    ]]></body>
<body><![CDATA[<p align="justify"><font face="verdana" size="2"><b>Abstract</b></font></p>  	    <p align="justify"><font face="verdana" size="2">A novel technique suitable for computer&#45;aided analysis of analog integrated circuits (ICs) is introduced. This technique uses the features of both nodal&#45;analysis (NA) and symbolic analysis, <u>at nullor level</u>. First, the nullor is used to model the ideal behavior of several analog devices, namely: transistors, opamps, OTAs, and current conveyors. From this modeling approach, it is shown how to transform circuits working in voltage&#45;mode to current&#45;mode and vice&#45;versa. Second, it is demonstrated that using nullors, all non&#45;NA&#45;compatible elements can be transformed into NA&#45;compatible ones, this results in a computationally&#45;improved pure&#45;NA method. Third, the computation of fully&#45;symbolic expressions using <i>MAPLEV&trade;</i>, is described. It is demonstrated that a symbolic expression gives more insight in the behavior and performance of the circuit. Finally, several examples demonstrate the suitability and appropriateness of the proposed method to be used in education.</font></p>  	    <p align="justify"><font face="verdana" size="2"><b>Keywords:</b> CAD Tools, Circuit Theory, Nullors, Analog Modeling, Symbolic Analysis, Nodal Analysis.</font></p>  	    <p>&nbsp;</p>  	    <p align="justify"><font face="verdana" size="2"><a href="/pdf/jart/v1n3/v1n3a5.pdf" target="_blank">DESCARGAR ART&Iacute;CULO EN FORMATO PDF</a></font></p>  	    <p>&nbsp;</p>  	    <p align="justify"><font face="verdana" size="2"><b>Acknowledgement</b></font></p>  	    <p align="justify"><font face="verdana" size="2">The authors would like to thank to INAOE for funding. This work has been supported by CONACYT / Mexico under the project J4032.</font></p>  	    <p>&nbsp;</p>  	    <p align="justify"><font face="verdana" size="2"><b>References</b></font></p>  	    ]]></body>
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