Electrical characterization of planarized a-SiGe:H Thin-film Transistors

M. Dominguez^a,b, P. Rosales^a and A. Torres^a

^a National Institute for Astrophysics, Optics and Electronics (INAOE), Electronics Department, Luis Enrique Erro No. 1, Puebla, Z.P. 72840, Mexico.

^b Department of Materials Science & Engineering, The University of Texas at Dallas, Richardson, TX 75080, USA. Tel: (52)(222) 266-3100 Fax: (52)(222) 247-0517. e-mail: mdominguez@inaoep.mx

Abstract

In this work the electrical characterization of n-channel a-SiGe:H TFTs with planarized gate electrode is presented. The planarized a-SiGe:H TFTs were fabricated at 200°C on corning glass substrate. The devices exhibit a subthreshold slope of 0.56 V/Decade, an on/off-current ratio approximately of 10⁶ and off-current approximately of 0.3 × 10^-12 A. The results show an improvement of the electrical characteristics when are compared to those unplanarized devices fabricated at higher temperature. Moreover, the simulation of the device using a SPICE model is presented.

Keywords: Thin-film transistor; hydrogenated amorphous silicon-germanium; low-temperature; spin-on glass; spice.

PACS: 81.05.Gc; 81.15.Gh; 85.30.Tv

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Acknowledgments

The authors want to thank to all personnel of the laboratory of microelectronics at INAOE and to the CONACYT for the scholarship No. 160547.

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