A 1.7 MHz Chua's circuit using VMs and CF+s
C. Sánchez López
Universidad Autónoma de Tlaxcala, Clzda Apizaquito s/n, km. 1.5, Apizaco, Tlaxcala, 70300, México.
Recibido el 29 de agosto de 2011.
Aceptado el 16 de enero de 2012.
Abstract
In this paper, a high–frequency Chua's chaotic oscillator based on unity gain cells (UGCs) is introduced. Leveraging the internal buffers of the integrated circuit AD844, a voltage mirror (VM) and a positive current follower (CF+) are designed, taking into account the parasitic elements associated to each UGC. Afterwards, the behavior of the nonlinear resistor and of the grounded inductor are designed by using several VMs, CF+s, discrete capacitors and resistors. In this way, Chua's circuit is built by coupling a nonlinear resistor and an active LC tank circuit by using an RC passive filter. Hspice simulations performed at the state space and in the time and frequency domains show that the proposed topology generates chaos at 1.7 MHz. Experimental results are given, verifying that the chaotic spectrum is extended to high–frequency and showing close agreement with theoretical analysis. The proposed topology is compared with other topologies reported in the literature, showing that a number reduced of active devices and passive elements along with smaller supply voltages can be used to generate chaotic oscillations at high–frequency. Sensitivity and Monte Carlo analysis are also done in order to research the robustness of the proposed chaotic circuit.
Keywords: Chaos; unity–gain cells; chua's circuit; double–scroll; voltage–mirror; current–mirror.
Resumen
El diseño de un oscilador caótico de Chua basado en celdas de ganancia unitaria y operando en alta frecuencia es presentado. Aprovechando los buffers internos del circuito integrado AD844, un espejo de voltaje y un seguidor de corriente positivo son diseñados, incluyendo los elementos parásitos asociados a cada celda de ganancia unitaria. Posteriormente, el comportamiento de un resistor no lineal y de un inductor aterrizado son realizados usando varios espejos de voltaje, seguidores de corriente, resistores y capacitores discretos. De esta manera, el resistor no–lineal es acoplado a un circuito tanque LC usando un filtro pasivo RC. Resultados de simulación en el plano de fase, en los dominios de tiempo y frecuencia, realizados en Hspice, muestran que la topología propuesta genera formas de onda caóticas a 1.7 MHz. Resultados experimentales son también mostrados a fin de verificar el comportamiento caótico en alta frecuencia y la similitud de los resultados experimentales con el analisis teorico. La topología propuesta se compara con otras topologías reportadas en la literatura, mostrando que un numero reducido de dispositivos activos y elementos pasivos junto con voltajes de alimentacion mas pequeñas, pueden ser usados para generar oscilaciones caooticas en alta frecuencia. Analisis de sensibilidad y de Monte Carlo son realizados con el fin de investigar la robustez del circuito caotico propuesto.
Descriptores: Caos; celdas de ganancia unitaria; espejo de voltage; espejo de corriente.
PACS: 05.45.Pq; 05.45.Pq; 84.30.Ng; 07.50.Ek; 84.30.–r; 01.50.Pa
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Acknowledgments
This work was supported in part by Consejeria de Innovacion, Ciencia y Empresa, Junta de Andalucia–Spain under grant TIC–2532 and by JAE–Doc program of CSIC co–funded by FSE–Spain.
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