1. Introduction

To generate bulk amount of AC electrical energy, fossil fuels have been used for centuries. But, the use of fossil fuels such as coal, natural gas, and petroleum, leads to serious environmental contaminations, public health issues, and increased cost of the power generation systems. Moreover, the existing fossil fuels are fast depleting and non-renewable. Due to the above drawbacks of conventional non-renewable energy systems, the researchers concentrated on an alternate scheme called the renewable form of power generation systems. One of the renewable energy sources like photovoltaic (PV) modules can be used to generate electrical energy in the form of DC. However, the DC output voltage from the PV source is low, and fluctuating due to the changes in sun irradiation and temperature. The low level DC output voltage of the PV source can be converted into a high level DC output voltage using an intermediate high gain DC-DC power electronic converter. This high level DC output voltage is to be fed to a grid connected inverter for producing AC electrical power. Hence, an appropriate high voltage gain DC-DC conversion stage needs to be developed with significant features of reduced voltage-current stress for the power switches and low ripples in the input current.

High voltage gain DC-DC converters can be divided into isolated and non-isolated topologies (^{Behera et al., 2020}; ^{Chen et al., 2019}; ^{Dobi & Sahid, 2020}; Forouzesh et al., 2018; ^{Girija & Murali, 2021}; ^{He & Khaligh, 2017}; ^{Mumtaz et al., 2021}; ^{Murali, 2021}; ^{Murali & Annapurani, 2019}; ^{Murali & Annapurani, 2021}; Saravanan & Ramesh Babu, 2019; ^{Shahir et al., 2017}; ^{Shahir et al., 2019}; ^{Siddharthan & Balasubramanian, 2019}; ^{Sowmya & Murali, 2019}; ^{Wang et al., 2019}). The DC input and DC output ports are isolated using a high frequency transformer in the case of isolated DC-DC converter configurations where high voltage gain proportional to the kVA rating of the transformer can be achieved. But the overall efficiency of the transformer-based converter topologies is reduced due to certain factors such as (i). voltage spikes on the power switches due to the transformer’s leakage inductance and higher amount of power dissipation, (ii). electromagnetic interference (EMI) problems. The structure and the control of the isolated configurations are also complicated. However, the simplified structure, high efficiency and the simple control of the non-isolated DC-DC converter configurations make it more desirable for electric vehicle (EV) applications (^{Chen et al., 2019}; ^{Wang et al., 2019}).

The conventional two-level single-switch DC-DC boost converter can achieve high voltage conversion ratio at duty cycle value nearer to unity (^{Hsieh et al., 2013}; ^{Hua et al., 1994}). But the high duty ratio results in reduced efficiency of the converter due to the increased conduction and switching losses. Another way of obtaining high voltage gain is by connecting a number of boost converters in series, which may lead to the high cost of conversion scheme.

A large voltage gain applied to fuel cell can be achieved using quadratic boost converter topologies (^{Leyva-Ramos et al., 2017}; ^{Wang, Qiu et al., 2019}). But, these topologies have a relatively large amount of switching power losses due to high voltage stress occurring in the transistors. Some authors proposed a coupled inductor based quadratic boost DC-DC converter with high voltage gain and reduced switch voltage stresses (^{Lee & Do, 2019}). The high voltage gain can also be achieved using multilevel converter topologies in which the transistors have lower voltage stress. However, the multilevel topologies have the disadvantage that more number of semiconductor devices needs to be used (^{Jiang et al., 2018}).

Non-isolated non-coupled inductor based DC-DC converter topologies have also been used to achieve high voltage gain (^{Annapurani & Murali, 2020}; Arab & Shokrollahi, 2019; ^{Varesi et al., 2017}). Due to the absence of magnetic components, the non-coupled inductor based DC-DC converter structures can produce high voltage gain with high power density and better efficiency. To improve the voltage gain of the converter, the switched-inductor (SI) and switched-capacitor (SC) based DC-DC converters with transformerless structures are also used, where the major issues are the high current and voltage stresses occurring on the power switches (^{Ajami et al., 2015}; ^{Jiao et al., 2011}; ^{Kim et al., 2019}; ^{Stala et al., 2019}; ^{Wu et al., 2015}). Hence, the coupled inductor approach was used to achieve high voltage conversion ratio (^{Axelrod et al., 2015}; ^{Liu et al., 2016}; ^{Mulla et al., 2021}). However, the coupled inductor structures have the disadvantage that the power switches are subjected to high voltage spikes due to the leakage inductance of the inductor. The switching losses are also increased. But, this issue can be resolved using an active clamp circuit (^{Liu & Li, 2016}).

To resolve the issues present in the converter topologies discussed in the above literature survey, a non-isolated three-level DC-DC boost converter topology has been suggested for obtaining a high voltage gain (^{Balakishan et al., 2015}). The converter structure proposed in (^{Balakishan et al., 2015}) has the same voltage gain as that of the conventional two-level boost topology. But, in three-level structure, the inductor has the reduced size and the voltage rating of the power switch is reduced to half of the output DC voltage. Hence, the switches are subjected to low voltage stress thereby reducing the switching losses. Hence, this paper proposes a non-isolated three-level DC-DC converter topology with input boost power stage so that the voltage gain is improved by (1+D) times that of the conventional two-level topology, where D is the duty ratio of the power switch. The converter proposed in this work is a double boost topology. The voltage gain of the proposed converter operating in continuous conduction mode is same as that of the non-isolated double boost DC-DC converter suggested in (^{Liu et al., 2020}). In (^{Liu et al., 2020}), the converter has the drawback that the voltage stress across the switch in the second boost stage is same as that of the conventional two-level boost converter. Whereas, in this research work, each switch at the output side is subjected to the voltage stress of half of the output voltage only. A prototype model of the converter configured as double boost topology has also been developed to validate the simulation results. The switches are subjected to low current stress.

The organization of the remaining sections is planned as follows: The topology and the modes of operation of the proposed converter are discussed in Section 2. Section 3 presents the MATLAB simulation results for the purpose of validating the proposed non-isolated positive output DC-DC converter. The developed prototype hardware model and its results for the proposed topology are discussed in Section 4. This is followed by the conclusions in Section 5.

2. Configuration and modes of operation of the proposed positive output three-level DC-DC converter

The configuration of a non-isolated positive output DC-DC boost converter with high voltage gain capability is shown in Figure 1. The suggested topology is the extension of the converter configuration given in (^{Balakishan et al., 2015}) with boost power stage included. The converter is operated in continuous conduction mode. The proposed configuration employs passive components such as two identical inductors (L_b and L) each of 1 mH inductance, and two identical capacitors C₁ and C₂ each of 200 µF capacitance. The capacitors C₁ and C₂ are selected so that the balancing of voltage is achieved across the capacitors. The suggested topology is a double boost configuration. The first stage is a boost power stage consisting of boost switch (S_b), boost inductor (L_b), boost pre-charge diode (D_b), and a boost rectifier diode (D_br) with DC source (V_in). The second stage is another boost power stage comprising of power switches (S₁ and S₂), two ideal diodes (D₁ and D₂), and the capacitors C₁ and C₂ respectively. Each of the capacitors C₁ and C₂ receives half of the output voltage (V₀) and are acting as filter capacitors to filter out the ripples in the DC output voltage and current. The ideal power switches (S_b, S₁, and S₂) are suitably triggered into conduction by proper gate pulses with duty ratio D = 0.8 for each switch. The switching frequency (f_s) of the switches is taken as 50 kHz. The four distinct modes of operation of the converter are discussed as shown in Figure 2. The key waveforms of the converter configuration proposed are shown in Figure 3.

Figure 1 Circuit configuration of the proposed non-isolated three-level DC-DC boost converter. 

(a) Mode-I (t₀ < t < t₁) 

(b) . Mode-II (t₁ < t < t₂) 

(c) Mode-III (t₂ < t < t₃) 

(d). Mode-IV (t₃ < t < t₄)

Figure 2 Modes of operation of the converter: (a). Mode I, (b). Mode II, (c). Mode III, (d). Mode IV. 

Figure 3 Key waveforms of the suggested converter for 0.5 < D < 1 during continuous inductor current mode. 

3. Simulation results and discussion

The MATLAB / SIMULINK model of the proposed non-isolated continuous inductor current mode operated three-level DC-DC converter with boost power stage is developed and is shown in Figure 4. The boost power stage consists of a power switch S_b, an inductor L_b, a diode D_b, and a boost rectifier diode D_br. The switching frequency (f_s) for the converter is chosen as 50 kHz with duty ratio D = 0.8 for each switch. The values of converter parameters used for simulation are shown in Table 1. Each of the three switches (S_b, S₁, S₂) is triggered into conduction by applying the gate pulse as shown in Figure 5. The converter circuit is energized by a DC input voltage (V_in) of 24 V as shown in Figure 6. The current (I_in) delivered by the input DC source is as shown in Figure 7. With duty ratio D = 0.8 for each switch, the voltage obtained at the load end (V₀) is around 208 V and the load current (I₀) is nearly 0.66 A as depicted in Figure 8 and Figure 9 respectively. But, without the boost power stage, the output voltage (V₀) is around 120 V and the corresponding output current (I₀) is nearly 0.38 A for the same input DC voltage and duty ratio (^{Balakishan et al., 2015}). Hence, the voltage conversion ratio as well as the output current of the converter proposed in this research work have been enhanced. The boost inductor (L_b) voltage and current waveforms are shown in Figure 10 and Figure 11 respectively. Similarly, the waveforms of voltage across and current through the inductor L are depicted in Figure 12 and Figure 13 respectively. The voltage stress and current stress of the power switches S_b, S₁, and S₂ are analyzed and the corresponding waveforms are shown in Figure 14, Figure 15, Figure 16, Figure 17, Figure 18, and Figure 19 respectively. This stress analysis illustrates that the switches are subjected to low voltage and current stresses compared to that for the conventional two-level boost converter. Hence, the switching losses are reduced in the proposed converter topology. The performance of the converter is validated by varying the duty ratio D of the switches from 0.6 to 0.9. The waveforms of voltages appearing across and the currents through the four diodes D_b, D_br, D₁, and D₂ are shown in Figure 20, Figure 21, Figure 22, Figure 23, Figure 24, Figure 25, Figure 26, and Figure 27 respectively. The analysis of waveforms of diodes indicates that the diodes are also subjected to low voltage-current stress. The waveform of voltages appearing across the two identical capacitors C₁ and C₂ is illustrated in Figure 28. The voltages are balanced across the capacitors. The sum of these two capacitor voltages is obtained as the output voltage (V₀) at the load end. The charging and discharging current characteristics of the capacitors C₁ and C₂ are shown in Figure 29 and Figure 30 respectively.

Figure 4 MATLAB / SIMULINK model of the proposed non-isolated DC-DC boost converter with boost power stage. 

Figure 5 Gate pulse to the power switch. 

Figure 6 Input voltage. 

Figure 7 Input DC current. 

Figure 8 Output DC voltage across the load R₀. 

Figure 9 Output DC current through the load R₀. 

Figure 10 Voltage across the boost inductor L_b. 

Figure 11 Current through the boost inductor L_b. 

Figure 12 Voltage across the inductor L. 

Figure 13 Current through the inductor L. 

Figure 14 Voltage across the switch S_b. 

Figure 15 Current through the switch S_b. 

Figure 16 Voltage across the switch S₁. 

Figure 17 Current through the switch S₁. 

Figure 18 Voltage across the switch S₂. 

Figure 19 Current through the switch S₂. 

Figure 20 Voltage across the diode D_b. 

Figure 21 Current through the diode D_b. 

Figure 22 Voltage across the diode D_br. 

Figure 23 Current through the diode D_br. 

Figure 24 Voltage across the diode D₁. 

Figure 25 Current through the diode D₁. 

Figure 26 Voltage across the diode D₂. 

Figure 27 Current through the diode D₂. 

Figure 28 Voltage across the capacitors C₁ and C₂. 

Figure 29 Current through the capacitor C₁. 

Figure 30 Current through the capacitor C₂. 

4. Prototype model of the converter

The prototype model of a rectifier-fed DC-DC converter based on double boost topology capable to deliver 100 W output power has been developed and is as shown in Figure 31. The double boost topology includes all components of three-level configuration shown in Figure 1, except the switch S₂ and the capacitor C₂ (^{Liu et al., 2020}). However, the voltage gain (G) equation is same for both the double boost topology and the three-level topology proposed in this work. The low power hardware model is designed to provide an output DC voltage of around 108 V at the load end for an average DC input voltage of around 12 V at the rectifier end. The power MOSFET switches are made to operate at duty ratio D = 0.8. The model employs an Integrated Circuit (IC) chip named as KA3525A PWM controller incorporating the control circuitry for the generation of pulse width modulated (PWM) signals for the MOSFET switches S_b and S₁. The PWM controller KA3525A is a 16 pin chip that requires a supply voltage of 40 V and features a reference output current of around 50 mA. It incorporates an error amplifier, voltage reference, a pulse width modulator, an undervoltage lockout, an oscillator, the output driver, and a soft start circuit, all in one package.

Figure 31 Prototype hardware model of the converter. 

The power switches are turned ON and OFF simultaneously as per the gate pulse waveforms shown in Figure 32. The values of components of the hardware model of the converter are listed as shown in Table 2. The actual waveforms, taken on digital storage oscilloscope (DSO), for all internal components and power switches are shown in Figure 33, Figure 34, Figure 35, Figure 36, Figure 37, Figure 38, Figure 39, Figure 40, Figure 41, and Figure 42 respectively.

Figure 32 Gate pulse waveforms for the switches S_b and S₁. 

Figure 33 Average DC input voltage (V_in). 

Figure 34 Voltage across the diode D_b. 

Figure 35 Voltage across the diode D_br. 

Figure 36 Voltage across the diode D₁. 

Figure 37 Voltage across the switch S_b. 

Figure 38 Voltage across the switch S₁. 

Figure 39 Voltage across the inductor L_b. 

Figure 40 Voltage across the inductor L. 

Figure 41 Output DC Voltage (V₀) equal to voltage across the capacitor C₁. 

Figure 42 Output current (I₀). 

5. Conclusions

In this paper, the steady state analysis of a non-isolated continuous input current positive output three-level DC-DC converter with boost power stage has been carried out. The validation of the performance of the proposed converter is done by simulating the converter in MATLAB / SIMULINK platform. The voltage and current waveforms for all the active and passive components of the converter are presented for duty ratio D = 0.8. The simulation results illustrate that the voltage gain of the proposed simple three-level DC-DC converter structure with boost power stage can be improved by (1+D) times that of the traditional three-level / boost configured DC-DC converter. The prototype model results are also provided to validate the theory and the time domain results. The additional features of the converter configuration proposed in this work are that the MOSFET switches are subjected to low voltage and current stresses thereby reducing the switching losses and hence improving the overall efficiency of DC-DC conversion. The diodes too experience low voltage-current stress. The filter components C₁ and C₂ are so chosen that the output voltage and current waveforms have only fewer amounts of ripples. Moreover, the output voltage and current waveforms settle down to steady state values after executing only few oscillations. The proposed converter is well-suited for renewable energy applications that require high voltage. Future work may include the application of the zero-voltage-switching concept to the active switches for switching loss reduction in the view to enhance the overall conversion efficiency.

Conflict of interest

The authors do not have any type of conflict of interest to declare.

Financing

The authors did not receive any sponsorship to carry out the research reported in the present manuscript.