FSM State-Encoding for Area and Power Minimization Using Simulated Evolution Algorithm

 

Sadiq M. Sait^*1, F. C. Oughali², A. M. Arafeh³

 

^1,2,3 Department of Computer Engineering.

¹ Center for Communications and IT Research, Research Institute King Fahd University of Petroleum & Minerals Dhahran, Saudi Arabia. *sadiq@kfupm.edu.sa.

 

ABSTRACT

In this paper we describe the engineering of a non-deterministic iterative heuristic [1] known as simulated evolution (SimE) to solve the well-known NP-hard state assignment problem (SAP). Each assignment of a code to a state is given a Goodness value derived from a matrix representation of the desired adjacency graph (DAG) proposed by Amaral et.al [2]. We use the (DAGa) proposed in previous studies to optimize the area, and propose a new DAGp and employ it to reduce the power dissipation. In the process of evolution, those states that have high Goodness have a smaller probability of getting perturbed, while those with lower Goodness can be easily reallocated. States are assigned to cells of a Karnaugh-map, in a way that those states that have to be close in terms of Hamming distance are assigned adjacent cells. Ordered weighed average (OWA) operator proposed by Yager [3] is used to combine the two objectives. Results are compared with those published in previous studies, for circuits obtained from the MCNC benchmark suite. It was found that the SimE heuristic produces better quality results in most cases, and/or in lesser time, when compared to both deterministic heuristics and non-deterministic iterative heuristics such as Genetic Algorithm.

Keywords: EDA, FSM Synthesis, State Encoding, Simulated Evolution, Multiobjective Optimization, Non-Deterministic Algorithms, Desired Adjacency Graphs, Fuzzy Logic.

 

DESCARGAR ARTÍCULO EN FORMATO PDF

 

Acknowledgment

The authors acknowledge King Fahd University of Petroleum & Minerals, Dhahran, Saudi Arabia for support. This work was also supported under KFUPM funded project # FT-2005/63.

 

References

[1] Sadiq M. Sait and Habib Youssef. Iterative Computer Algorithms with Applications in Engineering: Solving Combinatorial Optimization Problems. IEEE Computer Society Press, California, December 1999.         [ Links ]

[2] J. N. Amaral, K. Tumer, and J. Ghosh. Designing genetic algorithms for the state assignment problem. IEEE Transactions on Systems, Man and Cybernetics, 25(4):687 -694, April 1995.         [ Links ]

[3] Ronald R. Yager. On ordered weighted averaging aggregation operators in multicriteria decision making. IEEE Transaction on Systems, MAN, and Cybernetics, 18(1), January 1988.         [ Links ]

[4] Peter Weiner and Edward J. Smith. On the number of distinct state assignments for synchronous sequential machines. IEEE Transactions on Electronic Computers, EC-16(2):220-221, April. 1967.         [ Links ]

[5] Bernhard Eschermann. State assignment for hardwired VLSI control units. ACM Computer Survey 25:415 436, December 1993.         [ Links ]

[6] Pranav Ashar, Srinivas Devadas, and A. Richard Newton. Sequential Logic Synthesis. Kluwer Academic Publishers, Norwell, MA, USA, 1992.         [ Links ]

[7] A. R. Newton S. Devadas, H. T. Ma. Mustang: State assignment of finite state machines for optimal multi-level logic implememations. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, November 1987.         [ Links ]

[8] B. Lin and A. R. Newton. Synthesis of multiple level logic from symbolic high-level description languages. In Very Large Scale Integration, 1990.         [ Links ]

[9] R.E. Gonzalez D.Torres, J.Cortez. Semi-formal specifications and formal verification improving the digital design: some statistics. Journal of Applied Research and Technology, 7(1):15-40, April, 2009.         [ Links ]

[10] A. E. Ylmaz F. Yaman. Impacts of genetic algorithm parameters on the solution performance for the uniform circular antenna array pattern synthesis problem. Journal of Applied Research and Technology, 8(3):378-394, December, 2010.         [ Links ]

[11] Nareli Cruz-Cortes Ricardo Barron-Fernandez Jesus A. Alvarez-Cedillo Gerardo A. Laguna-Sanchez, Mauricio Olguin-Carbajal. Comparative study of parallel variants for a particle swarm optimization algorithm implemented on a multithreading GPU. Journal of Applied Research and Technology, 7(3):292-309, December, 2009.         [ Links ]

[12] A. Miranda-Vitela F. Lara-Rosano J. L. Perez-Silva, A. Garces-Madrigal. Dynamic fuzzy logic functor. Journal of Applied Research and Technology, 6(2):84-94, August, 2008.         [ Links ]

[13] Saurabh Chaudhury, Krishna Teja Sistla, and Santanu Chattopadhyay. Genetic algorithm-based FSM synthesis with area-power trade-offs. Integr. VLSI J., 42:376-384, June 2009.         [ Links ]

[14] Walid M. Aly. Solving the state assignment problem using stochastic search aided with simulated annealing. American Journal of Engineering and Applied Sciences, 2:703-707, 2009.         [ Links ]

[15] A. E. A. Almaini, J. F. Miller, P. Thomson, and S. Billina. State assignment of finite state machines using a genetic algorithm. IEE Proceedings - Computers and Digital Techniques, 142(4):279-286, Jul 1995.         [ Links ]

[16] M. Chyzy and W. Kosinski. Evolutionary algorithm for state assignment of finite state machines. In Proceedings of Euromicro Symposium on Digital System Design, pages 359-362, 2002.         [ Links ]

[17] N. Nedjah and Luiza de Macedo Mourelle. Evolutionary synthesis of synchronous finite state machines. In The 2006 International Conference on Computer Engineering and Systems, pages 19-24, November 2006.         [ Links ]

[18] D. B. Armstrong. A programmed algorithm for assigning internal codes to sequential machines. IRE Transactions on Electronic Computers, EC-11(4):466 - 472, Augest 1962.         [ Links ]

[19] J. N. Amaral and Wagner C. Cunha. State assignment algorithm for incompletely specified finite state machines. In Fifth Congress of the Brazilian Society of Microelectronics, 1990, pages 174-183, 1990.         [ Links ]

[20] L. Benini and G. DeMicheli. State encoding for low power embedded controllers. IEEE Journal of Solid State Circuits, 30:258 - 268, 1995.         [ Links ]

[21] S. Chattopadhyay and P. N. Reddy. Finite state machine state assignment targeting low power consumption. IEE Proceedings-Computers and Digital Techniques, 151(1):61-70, January 2004.         [ Links ]

[22] E. M. Sentovich, K. J. Singh, L. Lavagno, C. Moon, R. Murgai, A. Saldanha, H. Savoj, P.R. Stephan, Robert K. Brayton, and Alberto L. Sangiovanni-Vincentelli. SIS A system for sequential circuit synthesis. Technical Report UCB/ERL M92/41, EECS Department, University of California, Berkeley, 1992.         [ Links ]

[23] D. J. Comer. Digital Logic and State Machine Design. Saunders College Publishing, 3rd edition, 1995.         [ Links ]

[24] Y. Saab and V. Rao. Stochastic Evolution: A Fast Effective Heuristic for some Generic Layout Problems. In 27th ACM/IEEE Design Automation Conference, pages 26-31, 1990.         [ Links ]

[25] R. M. Kling and Prithviraj Banerjee. Optimization by simulated evolution with applications to standard cell placement. In Proceedings of the 27th ACM/IEEE Design Automation Conference, DAC '90, pages 20 25, New York, NY, USA, 1990. ACM.         [ Links ]

[26] T. Villa and A. Sangiovanni-Vincentelli. Nova: state assignment of finite state machines for optimal two level logic implementation. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 9(9):905 -924, Sep 1990.         [ Links ]

[27] A. El-Maleh, Sadiq M. Sait, and F. Nawaz Khan. Finite state machine state assignment for area and power minimization. In Proceedings of IEEE International Symposium on Circuits and Systems, 2006.         [ Links ]