A FPGA implementation of solder paste deposit on printed circuit boards errors detector based in a bright and contrast algorithm

A. De Luca-Pennacchia & M. Á. Sánchez-Martínez

Department of Computation, CINVESTAV-IPN, Mexico D.F., Mexico Phone (5255) 50-61-38-00 Fax (5255) 50-61-37-57, E-mail: dlap@delta.cs.cinvestav.mx

Abstract

Solder paste deposit on printed circuit boards (PCB) is a critical stage. It is known that about 60% of functionality defects in this type of boards are due to poor solder paste printing. These defects can be diminished by means of automatic optical inspection of this printing. Actually, this process is implemented by image processing software with its inherent high computational time cost. In this paper we propose to implement a high parallel degree image comparison algorithm suitable to be implemented on FPGA, which could be incorporated to an automatic inspection system. The hardware implementation of the algorithm allows us to fulfill time requirements demanded by industry.

Keywords: Solder, paste inspection, histogram comparison, FPGA.

Resumen

El depósito de soldadura de pasta es una fase crítica en las placas de circuitos impresos (PCB por sus siglas en inglés). Se sabe que cerca del 60% de los defectos funcionales en este tipo de placas son debidos a una impresión de soldadura de pasta deficiente. De hecho, este proceso es implementado mediante software de procesamiento de imagen con su inherente alto costo computacional. En este trabajo proponemos implementar un algoritmo de comparación de imagen con un alto grado de paralelismo idóneo para ser implementado en FPGA, el cual puede ser incorporado a un sistema de inspección automático. La implementación en hardware del algoritmo nos permite satisfacer los requerimientos en tiempo demandados por la industria.

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