Resumo

MAYA-HERNANDEZ, P.M.; SANZ-PASCUAL, M.T.; DIAZ-SANCHEZ, A.  e  CALVO, B.. Diseño integrado de un Amplificador Lock-in compacto de bajo consumo para aplicaciones portátiles. Superf. vacío [online]. 2014, vol.27, n.2, pp.66-73. ISSN 1665-3521.

A technique for measuring the amplitude of a signal, even if the superimposed noise and interferences are higher than the signal itself, is the technique of phase sensitive detection, which is the basis of lock-in amplifiers. In this work a novel design of an integrated current mode lock-in amplifier in 0.18μm CMOS technology with 1.8V supply voltage is presented. It is suitable for portable applications thanks to its reduced low power consumption and single supply voltage. The proposed architecture is capable of recovering a signal of interest from noisy environments with errors below 6.1% for a dynamic reserve of 42.7dB. It is provided of a digitally programmable gain ranging from 1.2 to 20.3dB, the input referred noise is @1kHz and power consumption is 237μW.

Palavras-chave : CMOS Analog Design; Sensor Conditioning Circuit; Lock-In Amplifier; Signal Recovery; Phase-Sensitive Detection.

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