Ingeniería, investigación y tecnología
versión impresa ISSN 1405-7743
Statistical models for integrated circuits (IC) allow us to estimate the percentage of acceptable devices in the batch before fabrication. Actually, Pelgrom is the statistical model most accepted in the industry; however it was derived from a micrometer technology, which does not guarantee reliability in nanometric manufacturing processes. This work considers three of the most relevant statistical models in the industry and evaluates their limitations and advantages in analog design, so that the designer has a better criterion to make a choice. Moreover, it shows how several statistical models can be used for each one of the stages and design purposes.
Palabras llave : mismatch; analog design; variability; yield; models; channel shrinkage.