Resumo

LUNA-LOPEZ, J.A; ACEVES-MIJARES, M; OLEKSANDR, Malik  e  GLAENZER, R. Modelling the C-V characteristics of MOS capacitor on high resistivity silicon substrate for PIN photodetector applications. Rev. mex. fis. [online]. 2006, vol.52, suppl.2, pp.45-47. ISSN 0035-001X.

This work proposes an electrical model to simulate the C-V measurements of the MOS capacitor on high resistivity silicon. High resistivity silicon is used as a substrate for PIN photo detectors. C-V MOS capacitor characteristics on high resistivity silicon substrates differ considerably from the C-V characteristics of low resistivity silicon substrates due to potential drop and majority and minority carrier response time. MOS C-V characteristics on high and low resistivity substrates at different frequencies were modelled by means of a series capacitor and resistor network. The system predicts the experimental results very well.

Palavras-chave : MOS; HRS and LRS substrates; high and low frequency C-V characteristics; time of response majority and minority carriers.

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