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Journal of applied research and technology
versión On-line ISSN 2448-6736versión impresa ISSN 1665-6423
J. appl. res. technol vol.10 no.6 Ciudad de México dic. 2012
Hardware Approach of R-Peak Detection for the Measurement of Fetal and Maternal Heart Rates
M. A. Hasan1, Md Mamun*2
1 School of Electrical and Electronic Engineering The University of Adelaide South Australia 5005, Australia.
2 Department of Electrical, Electronic and Systems Engineering Universiti Kebangsaan Malaysia 43600 UKM, Bangi, Selangor, Malaysia. *mdmamun.ukm@gmail.com.
ABSTRACT
Fetal heart rate (FHR) monitoring is a routine for obtaining significant information about the fetal condition during pregnancy and labour. Fetal condition may change abruptly during the pregnancy period. Therefore, a continuous fetal electrocardiogram (FECG) monitoring will ease the fetal well-being. An algorithm has been developed to detect R-peak for the simultaneous measurement of the fetal and maternal hearts rates during pregnancy and labor for fetal monitoring. The algorithm is based on a cross-correlation, adaptive threshold and statistical properties in the time domain. The performance achieved for the R-peak detection for the heart rate measurements shows that the model can extract R-peak for both, mother and fetus utilizing a single-lead configuration. The algorithm has been implemented in the field of propagation gate array (FPGA). The design was synthesized and fitted into Altera’s Stratix EP1S10 using the Quartus II platform because of its enhanced DSP capability. Test case results showed an error percentage of around ± 0.3% and ± 0.5% for the R-peak detection of maternal and fetal mortality respectively. The system is capable of running at a maximum clock frequency of 48.56MHz, and consumes 9633 logic elements, 101616 memory space and 4 units of DSP blocks.
Keywords: FPGA, Electrocardiogram, VHDL, DSP, Fetal heart rate, QRS.
RESUMEN
El monitoreo de la frecuencia cardiaca fetal (FHR) es una rutina para obtener información significativa sobre el estado del feto durante el embarazo y el parto. La condición fetal puede cambiar abruptamente durante el período de embarazo. Por lo tanto, un continuo monitoreo fetal por medio de electrocardiograma (FECG) facilitará el bienestar fetal. Se ha desarrollado un algoritmo para detectar el pico R para la medición simultánea de las frecuencias cardiacas fetal y materna durante el embarazo y el trabajo de monitorización fetal. El algoritmo se basa en la correlación cruzada del umbral adaptativo y propiedades estadísticas en el dominio del tiempo. El desempeño obtenido para la detección del pico R para las mediciones del ritmo cardíaco muestra que el modelo puede extraer picos R para ambos madre y feto utilizando una configuración de una sola via. El algoritmo ha sido implementado en el arreglo de compuertas de propagación (FPGA). El diseño fué sintetizado y acomodado en Stratix de Altera EP1S10 utilizando la plataforma Quartus II debido a su capacidad DSP mejorada. Los resultados de las pruebas de caso mostraron un porcentaje de error de alrededor de ± 0,3% y ± 0,5% para la detección R-pico de la mortalidad materna y fetal, respectivamente. El sistema es capaz de funcionar a una frecuencia de reloj máxima de 48.56MHz, y consumes 9633 elementos lógicos, 101616 espacio de memoria y 4 unidades de bloques DSP.
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