Resumen

KAZDIR, M. S. El; RZAIZI, M.; ASSALI, K. El  y  ABOUELAOUALIM, D.. Design and simulation of hybrid SET-CMOS logic inverter using macro-model technique. Rev. mex. fis. [online]. 2022, vol.68, n.6.  Epub 31-Jul-2023. ISSN 0035-001X.  https://doi.org/10.31349/revmexfis.68.061401.

The single-electron transistor (SET) is one of the state-of-the-art devices that can offer high operating speed with ultra-low power consumption. The SET macro-modeling, can be used for the simulation of a SET-CMOS logic circuit. In this work, we develop a new hybrid, SET-CMOS logic inverter macro-model whose effect is very useful in VLSI circuits design. All simulations are performed using the SIM-SCAPE environment of MATLAB SIMULINK. This architecture has been realized by implementing the NMOS logic of the conventional inverter with a SET macro-model. The simulation results show that the hybrid structure offers better performance. Indeed, the designed circuit is able to operate at room temperature.

Palabras llave : Single electron transistor (SET); macro-modeling; simscape; logic Inverter; hybrid SET-CMOS logic.

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