Artículos

 

Design of a General Purpose 8-bit RISC Processor for Computer Architecture Learning

 

Antonio Hernández Zavala¹, Oscar Camacho Nieto³, Jorge A. Huerta Ruelas¹, Arodí R. Carvallo Domínguez²

 

¹ Instituto Politécnico Nacional, Centro de Investigación en Ciencia Aplicada y Tecnología Avanzada, Mechatronics Department, Querétaro, México. anhernandezz@ipn.mx, jhuertar@ipn.mx

² Instituto Politécnico Nacional, Unidad Profesional Interdisciplinaria en Ingeniería y Tecnologías Avanzadas, Engineering Department, Mexico City, México. acarvallo@ipn.mx

³ Instituto Politécnico Nacional, Centro de Innovación y Desarrollo Tecnológico en Cómputo, Mexico City, México. ocamacho@ipn.mx

Corresponding author is Antonio Hernández Zavala.

 

Article received on 27/11/2014.
Accepted on 15/01/2015.

 

Abstract

Computers are becoming indispensable for manipulating most everyday consumer products, ranging from communications and domestic electronics to industrial processes monitoring and control. High performance computer design is not only subject to the technology used for its implementation, it is also a matter of efficient training. The skills that must prevail in a good computer designer come from the type of courses taken and the tools employed during them. This work shows the design of an 8-bit RISC soft-core processor dedicated to a complete understanding of computer architecture. We consider this Processor an effective hands-on training solution for the comprehension of a computer from its lowest level up to testing.

Keywords: Computer architecture, digital design, digital logic, microprocessor, programmable logic devices, training system.

 

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Acknowledgements

Authors would like to thank Instituto Politécnico Nacional and CONACYT who funded this work.

 

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